1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2015 3*4882a593Smuzhiyun * Kamil Lulko, <kamil.lulko@gmail.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <common.h> 9*4882a593Smuzhiyun #include <asm/io.h> 10*4882a593Smuzhiyun #include <asm/armv7m_mpu.h> 11*4882a593Smuzhiyun #include <asm/arch/stm32.h> 12*4882a593Smuzhiyun get_cpu_rev(void)13*4882a593Smuzhiyunu32 get_cpu_rev(void) 14*4882a593Smuzhiyun { 15*4882a593Smuzhiyun return 0; 16*4882a593Smuzhiyun } 17*4882a593Smuzhiyun arch_cpu_init(void)18*4882a593Smuzhiyunint arch_cpu_init(void) 19*4882a593Smuzhiyun { 20*4882a593Smuzhiyun struct mpu_region_config stm32_region_config[] = { 21*4882a593Smuzhiyun { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, 22*4882a593Smuzhiyun STRONG_ORDER, REGION_4GB }, 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun int i; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun configure_clocks(); 27*4882a593Smuzhiyun /* 28*4882a593Smuzhiyun * Configure the memory protection unit (MPU) to allow full access to 29*4882a593Smuzhiyun * the whole 4GB address space. 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun disable_mpu(); 32*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++) 33*4882a593Smuzhiyun mpu_config(&stm32_region_config[i]); 34*4882a593Smuzhiyun enable_mpu(); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun return 0; 37*4882a593Smuzhiyun } 38*4882a593Smuzhiyun s_init(void)39*4882a593Smuzhiyunvoid s_init(void) 40*4882a593Smuzhiyun { 41*4882a593Smuzhiyun } 42