1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 Altera Corporation <www.altera.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _FREEZE_CONTROLLER_H_ 8*4882a593Smuzhiyun #define _FREEZE_CONTROLLER_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun struct socfpga_freeze_controller { 11*4882a593Smuzhiyun u32 vioctrl; 12*4882a593Smuzhiyun u32 padding[3]; 13*4882a593Smuzhiyun u32 hioctrl; 14*4882a593Smuzhiyun u32 src; 15*4882a593Smuzhiyun u32 hwctrl; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define FREEZE_CHANNEL_NUM (4) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun typedef enum { 21*4882a593Smuzhiyun FREEZE_CTRL_FROZEN = 0, 22*4882a593Smuzhiyun FREEZE_CTRL_THAWED = 1 23*4882a593Smuzhiyun } FREEZE_CTRL_CHAN_STATE; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_ADDRESS 0x40 26*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW 0x0 27*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_SRC_VIO1_ENUM_HW 0x1 28*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_VIOCTRL_SLEW_MASK 0x00000010 29*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_VIOCTRL_WKPULLUP_MASK 0x00000008 30*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_VIOCTRL_TRISTATE_MASK 0x00000004 31*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_VIOCTRL_BUSHOLD_MASK 0x00000002 32*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_VIOCTRL_CFG_MASK 0x00000001 33*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_SLEW_MASK 0x00000010 34*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_WKPULLUP_MASK 0x00000008 35*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_TRISTATE_MASK 0x00000004 36*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_BUSHOLD_MASK 0x00000002 37*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_CFG_MASK 0x00000001 38*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_REGRST_MASK 0x00000080 39*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_OCTRST_MASK 0x00000040 40*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_OCT_CFGEN_CALSTART_MASK 0x00000100 41*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK 0x00000020 42*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HWCTRL_VIO1REQ_MASK 0x00000001 43*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_FROZEN 0x2 44*4882a593Smuzhiyun #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_THAWED 0x1 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun void sys_mgr_frzctrl_freeze_req(void); 47*4882a593Smuzhiyun void sys_mgr_frzctrl_thaw_req(void); 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #endif /* _FREEZE_CONTROLLER_H_ */ 50