xref: /OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/board.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Altera SoCFPGA common board code
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2015 Marek Vasut <marex@denx.de>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <errno.h>
11*4882a593Smuzhiyun #include <asm/arch/reset_manager.h>
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <usb.h>
15*4882a593Smuzhiyun #include <usb/dwc2_udc.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun 
s_init(void)19*4882a593Smuzhiyun void s_init(void) {}
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun  * Miscellaneous platform dependent initialisations
23*4882a593Smuzhiyun  */
board_init(void)24*4882a593Smuzhiyun int board_init(void)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun 	/* Address of boot parameters for ATAG (if ATAG is used) */
27*4882a593Smuzhiyun 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	return 0;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #ifdef CONFIG_USB_GADGET
33*4882a593Smuzhiyun struct dwc2_plat_otg_data socfpga_otg_data = {
34*4882a593Smuzhiyun 	.usb_gusbcfg	= 0x1417,
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
board_usb_init(int index,enum usb_init_type init)37*4882a593Smuzhiyun int board_usb_init(int index, enum usb_init_type init)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun 	int node[2], count;
40*4882a593Smuzhiyun 	fdt_addr_t addr;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc",
43*4882a593Smuzhiyun 					   COMPAT_ALTERA_SOCFPGA_DWC2USB,
44*4882a593Smuzhiyun 					   node, 2);
45*4882a593Smuzhiyun 	if (count <= 0)	/* No controller found. */
46*4882a593Smuzhiyun 		return 0;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg");
49*4882a593Smuzhiyun 	if (addr == FDT_ADDR_T_NONE) {
50*4882a593Smuzhiyun 		printf("UDC Controller has no 'reg' property!\n");
51*4882a593Smuzhiyun 		return -EINVAL;
52*4882a593Smuzhiyun 	}
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/* Patch the address from OF into the controller pdata. */
55*4882a593Smuzhiyun 	socfpga_otg_data.regs_otg = addr;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	return dwc2_udc_probe(&socfpga_otg_data);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
g_dnl_board_usb_cable_connected(void)60*4882a593Smuzhiyun int g_dnl_board_usb_cable_connected(void)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	return 1;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun #endif
65