1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Qualcomm APQ8016 memory map 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * (C) Copyright 2016 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <common.h> 10*4882a593Smuzhiyun #include <asm/armv8/mmu.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun static struct mm_region apq8016_mem_map[] = { 13*4882a593Smuzhiyun { 14*4882a593Smuzhiyun .virt = 0x0UL, /* Peripheral block */ 15*4882a593Smuzhiyun .phys = 0x0UL, /* Peripheral block */ 16*4882a593Smuzhiyun .size = 0x8000000UL, 17*4882a593Smuzhiyun .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | 18*4882a593Smuzhiyun PTE_BLOCK_NON_SHARE | 19*4882a593Smuzhiyun PTE_BLOCK_PXN | PTE_BLOCK_UXN 20*4882a593Smuzhiyun }, { 21*4882a593Smuzhiyun .virt = 0x80000000UL, /* DDR */ 22*4882a593Smuzhiyun .phys = 0x80000000UL, /* DDR */ 23*4882a593Smuzhiyun .size = 0x80000000UL, 24*4882a593Smuzhiyun .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 25*4882a593Smuzhiyun PTE_BLOCK_INNER_SHARE 26*4882a593Smuzhiyun }, { 27*4882a593Smuzhiyun /* List terminator */ 28*4882a593Smuzhiyun 0, 29*4882a593Smuzhiyun } 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun struct mm_region *mem_map = apq8016_mem_map; 33