xref: /OK3568_Linux_fs/u-boot/arch/arm/mach-s5pc1xx/include/mach/pwm.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2009 Samsung Electronics
3*4882a593Smuzhiyun  * Kyungmin Park <kyungmin.park@samsung.com>
4*4882a593Smuzhiyun  * Minkyu Kang <mk7.kang@samsung.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __ASM_ARM_ARCH_PWM_H_
10*4882a593Smuzhiyun #define __ASM_ARM_ARCH_PWM_H_
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define PRESCALER_0		(8 - 1)		/* prescaler of timer 0, 1 */
13*4882a593Smuzhiyun #define PRESCALER_1		(16 - 1)	/* prescaler of timer 2, 3, 4 */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /* Divider MUX */
16*4882a593Smuzhiyun #define MUX_DIV_1		0		/* 1/1 period */
17*4882a593Smuzhiyun #define MUX_DIV_2		1		/* 1/2 period */
18*4882a593Smuzhiyun #define MUX_DIV_4		2		/* 1/4 period */
19*4882a593Smuzhiyun #define MUX_DIV_8		3		/* 1/8 period */
20*4882a593Smuzhiyun #define MUX_DIV_16		4		/* 1/16 period */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define MUX_DIV_SHIFT(x)	(x * 4)
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define TCON_OFFSET(x)		((x + 1) * (!!x) << 2)
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define TCON_START(x)		(1 << TCON_OFFSET(x))
27*4882a593Smuzhiyun #define TCON_UPDATE(x)		(1 << (TCON_OFFSET(x) + 1))
28*4882a593Smuzhiyun #define TCON_INVERTER(x)	(1 << (TCON_OFFSET(x) + 2))
29*4882a593Smuzhiyun #define TCON_AUTO_RELOAD(x)	(1 << (TCON_OFFSET(x) + 3))
30*4882a593Smuzhiyun #define TCON4_AUTO_RELOAD	(1 << 22)
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #ifndef __ASSEMBLY__
33*4882a593Smuzhiyun struct s5p_timer {
34*4882a593Smuzhiyun 	unsigned int	tcfg0;
35*4882a593Smuzhiyun 	unsigned int	tcfg1;
36*4882a593Smuzhiyun 	unsigned int	tcon;
37*4882a593Smuzhiyun 	unsigned int	tcntb0;
38*4882a593Smuzhiyun 	unsigned int	tcmpb0;
39*4882a593Smuzhiyun 	unsigned int	tcnto0;
40*4882a593Smuzhiyun 	unsigned int	tcntb1;
41*4882a593Smuzhiyun 	unsigned int	tcmpb1;
42*4882a593Smuzhiyun 	unsigned int	tcnto1;
43*4882a593Smuzhiyun 	unsigned int	tcntb2;
44*4882a593Smuzhiyun 	unsigned int	tcmpb2;
45*4882a593Smuzhiyun 	unsigned int	tcnto2;
46*4882a593Smuzhiyun 	unsigned int	tcntb3;
47*4882a593Smuzhiyun 	unsigned int	res1;
48*4882a593Smuzhiyun 	unsigned int	tcnto3;
49*4882a593Smuzhiyun 	unsigned int	tcntb4;
50*4882a593Smuzhiyun 	unsigned int	tcnto4;
51*4882a593Smuzhiyun 	unsigned int	tintcstat;
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun #endif	/* __ASSEMBLY__ */
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #endif
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