1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2022 Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <common.h> 8*4882a593Smuzhiyun #include <dm.h> 9*4882a593Smuzhiyun #include <syscon.h> 10*4882a593Smuzhiyun #include <asm/arch/clock.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun static const struct udevice_id rv1106_syscon_ids[] = { 13*4882a593Smuzhiyun { .compatible = "rockchip,rv1106-grf", .data = ROCKCHIP_SYSCON_GRF }, 14*4882a593Smuzhiyun { .compatible = "rockchip,rv1106-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF }, 15*4882a593Smuzhiyun { } 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun U_BOOT_DRIVER(syscon_rv1106) = { 19*4882a593Smuzhiyun .name = "rv1106_syscon", 20*4882a593Smuzhiyun .id = UCLASS_SYSCON, 21*4882a593Smuzhiyun .of_match = rv1106_syscon_ids, 22*4882a593Smuzhiyun #if !CONFIG_IS_ENABLED(OF_PLATDATA) 23*4882a593Smuzhiyun .bind = dm_scan_fdt_dev, 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun }; 26