1 /*
2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <common.h>
9 #include <dm.h>
10 #include <syscon.h>
11 #include <asm/arch/clock.h>
12
13 static const struct udevice_id rk3288_syscon_ids[] = {
14 { .compatible = "rockchip,rk3288-noc", .data = ROCKCHIP_SYSCON_NOC },
15 { .compatible = "rockchip,rk3288-grf", .data = ROCKCHIP_SYSCON_GRF },
16 { .compatible = "rockchip,rk3288-sgrf", .data = ROCKCHIP_SYSCON_SGRF },
17 { .compatible = "rockchip,rk3288-pmu", .data = ROCKCHIP_SYSCON_PMU },
18 { }
19 };
20
21 U_BOOT_DRIVER(syscon_rk3288) = {
22 .name = "rk3288_syscon",
23 .id = UCLASS_SYSCON,
24 .of_match = rk3288_syscon_ids,
25 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
26 .bind = dm_scan_fdt_dev,
27 #endif
28 };
29
30 #if CONFIG_IS_ENABLED(OF_PLATDATA)
rk3288_syscon_bind_of_platdata(struct udevice * dev)31 static int rk3288_syscon_bind_of_platdata(struct udevice *dev)
32 {
33 dev->driver_data = dev->driver->of_match->data;
34 debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
35
36 return 0;
37 }
38
39 U_BOOT_DRIVER(rockchip_rk3288_noc) = {
40 .name = "rockchip_rk3288_noc",
41 .id = UCLASS_SYSCON,
42 .of_match = rk3288_syscon_ids,
43 .bind = rk3288_syscon_bind_of_platdata,
44 };
45
46 U_BOOT_DRIVER(rockchip_rk3288_grf) = {
47 .name = "rockchip_rk3288_grf",
48 .id = UCLASS_SYSCON,
49 .of_match = rk3288_syscon_ids + 1,
50 .bind = rk3288_syscon_bind_of_platdata,
51 };
52
53 U_BOOT_DRIVER(rockchip_rk3288_sgrf) = {
54 .name = "rockchip_rk3288_sgrf",
55 .id = UCLASS_SYSCON,
56 .of_match = rk3288_syscon_ids + 2,
57 .bind = rk3288_syscon_bind_of_platdata,
58 };
59
60 U_BOOT_DRIVER(rockchip_rk3288_pmu) = {
61 .name = "rockchip_rk3288_pmu",
62 .id = UCLASS_SYSCON,
63 .of_match = rk3288_syscon_ids + 3,
64 .bind = rk3288_syscon_bind_of_platdata,
65 };
66 #endif
67