1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Google, Inc
3*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <syscon.h>
11*4882a593Smuzhiyun #include <asm/arch/clock.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun static const struct udevice_id rk3288_syscon_ids[] = {
14*4882a593Smuzhiyun { .compatible = "rockchip,rk3288-noc", .data = ROCKCHIP_SYSCON_NOC },
15*4882a593Smuzhiyun { .compatible = "rockchip,rk3288-grf", .data = ROCKCHIP_SYSCON_GRF },
16*4882a593Smuzhiyun { .compatible = "rockchip,rk3288-sgrf", .data = ROCKCHIP_SYSCON_SGRF },
17*4882a593Smuzhiyun { .compatible = "rockchip,rk3288-pmu", .data = ROCKCHIP_SYSCON_PMU },
18*4882a593Smuzhiyun { }
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun U_BOOT_DRIVER(syscon_rk3288) = {
22*4882a593Smuzhiyun .name = "rk3288_syscon",
23*4882a593Smuzhiyun .id = UCLASS_SYSCON,
24*4882a593Smuzhiyun .of_match = rk3288_syscon_ids,
25*4882a593Smuzhiyun #if !CONFIG_IS_ENABLED(OF_PLATDATA)
26*4882a593Smuzhiyun .bind = dm_scan_fdt_dev,
27*4882a593Smuzhiyun #endif
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(OF_PLATDATA)
rk3288_syscon_bind_of_platdata(struct udevice * dev)31*4882a593Smuzhiyun static int rk3288_syscon_bind_of_platdata(struct udevice *dev)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun dev->driver_data = dev->driver->of_match->data;
34*4882a593Smuzhiyun debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun return 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_rk3288_noc) = {
40*4882a593Smuzhiyun .name = "rockchip_rk3288_noc",
41*4882a593Smuzhiyun .id = UCLASS_SYSCON,
42*4882a593Smuzhiyun .of_match = rk3288_syscon_ids,
43*4882a593Smuzhiyun .bind = rk3288_syscon_bind_of_platdata,
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_rk3288_grf) = {
47*4882a593Smuzhiyun .name = "rockchip_rk3288_grf",
48*4882a593Smuzhiyun .id = UCLASS_SYSCON,
49*4882a593Smuzhiyun .of_match = rk3288_syscon_ids + 1,
50*4882a593Smuzhiyun .bind = rk3288_syscon_bind_of_platdata,
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_rk3288_sgrf) = {
54*4882a593Smuzhiyun .name = "rockchip_rk3288_sgrf",
55*4882a593Smuzhiyun .id = UCLASS_SYSCON,
56*4882a593Smuzhiyun .of_match = rk3288_syscon_ids + 2,
57*4882a593Smuzhiyun .bind = rk3288_syscon_bind_of_platdata,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_rk3288_pmu) = {
61*4882a593Smuzhiyun .name = "rockchip_rk3288_pmu",
62*4882a593Smuzhiyun .id = UCLASS_SYSCON,
63*4882a593Smuzhiyun .of_match = rk3288_syscon_ids + 3,
64*4882a593Smuzhiyun .bind = rk3288_syscon_bind_of_platdata,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun #endif
67