xref: /OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3188/rk3188.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2016 Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:     GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/io.h>
9*4882a593Smuzhiyun #include <asm/arch/hardware.h>
10*4882a593Smuzhiyun #include <asm/arch/periph.h>
11*4882a593Smuzhiyun #include <asm/arch/grf_rk3188.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define GRF_BASE	0x20008000
board_debug_uart_init(void)14*4882a593Smuzhiyun void board_debug_uart_init(void)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun 	struct rk3188_grf * const grf = (void *)GRF_BASE;
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun 	rk_clrsetreg(&grf->gpio1b_iomux,
19*4882a593Smuzhiyun 		     GPIO1B1_MASK << GPIO1B1_SHIFT |
20*4882a593Smuzhiyun 		     GPIO1B0_MASK << GPIO1B0_SHIFT,
21*4882a593Smuzhiyun 		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
22*4882a593Smuzhiyun 		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun 
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