1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * (C) Copyright 2021 Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include <config.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#ifdef CONFIG_ARM64 9*4882a593Smuzhiyun/* 10*4882a593Smuzhiyun * Switch from AArch64 EL2 to AArch32 EL2 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * @param inputs: 13*4882a593Smuzhiyun * x0: argument, zero 14*4882a593Smuzhiyun * x1: machine nr 15*4882a593Smuzhiyun * x2: fdt address 16*4882a593Smuzhiyun * x3: input argument 17*4882a593Smuzhiyun * x4: kernel entry point 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * @param outputs for secure firmware: 20*4882a593Smuzhiyun * x0: function id 21*4882a593Smuzhiyun * x1: kernel entry point 22*4882a593Smuzhiyun * x2: machine nr 23*4882a593Smuzhiyun * x3: fdt address 24*4882a593Smuzhiyun * x4: input argument 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun.global armv8_el2_to_aarch32 27*4882a593Smuzhiyunarmv8_el2_to_aarch32: 28*4882a593Smuzhiyun mov x0, x3 29*4882a593Smuzhiyun mov x3, x2 30*4882a593Smuzhiyun mov x2, x1 31*4882a593Smuzhiyun mov x1, x4 32*4882a593Smuzhiyun mov x4, x0 33*4882a593Smuzhiyun ldr x0, =0x82000023 34*4882a593Smuzhiyun smc #0 35*4882a593Smuzhiyun ret 36*4882a593Smuzhiyun#endif 37*4882a593Smuzhiyun 38