1 /*
2 * arch/arm/cpu/armv7/rmobile/pfc-r8a7792.c
3 * This file is r8a7792 processor support - PFC hardware block.
4 *
5 * Copyright (C) 2016 Renesas Electronics Corporation
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10 #include <common.h>
11 #include <sh_pfc.h>
12 #include <asm/gpio.h>
13 #include "pfc-r8a7790.h"
14
15 enum {
16 PINMUX_RESERVED = 0,
17
18 PINMUX_DATA_BEGIN,
19 GP_ALL(DATA),
20 PINMUX_DATA_END,
21
22 PINMUX_INPUT_BEGIN,
23 GP_ALL(IN),
24 PINMUX_INPUT_END,
25
26 PINMUX_OUTPUT_BEGIN,
27 GP_ALL(OUT),
28 PINMUX_OUTPUT_END,
29
30 PINMUX_FUNCTION_BEGIN,
31 GP_ALL(FN),
32
33 /* GPSR0 */
34 FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3,
35 FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7,
36 FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,
37 FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15,
38 FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19,
39 FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23,
40 FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3,
41 FN_IP1_4,
42
43 /* GPSR1 */
44 FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8,
45 FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12,
46 FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,
47 FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15,
48 FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,
49 FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE,
50
51 /* GPSR2 */
52 FN_D0, FN_D1, FN_D2, FN_D3,
53 FN_D4, FN_D5, FN_D6, FN_D7,
54 FN_D8, FN_D9, FN_D10, FN_D11,
55 FN_D12, FN_D13, FN_D14, FN_D15,
56 FN_A0, FN_A1, FN_A2, FN_A3,
57 FN_A4, FN_A5, FN_A6, FN_A7,
58 FN_A8, FN_A9, FN_A10, FN_A11,
59 FN_A12, FN_A13, FN_A14, FN_A15,
60
61 /* GPSR3 */
62 FN_A16, FN_A17, FN_A18, FN_A19,
63 FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0,
64 FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4,
65 FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR,
66 FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0,
67 FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19,
68 FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0,
69
70 /* GPSR4 */
71 FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC,
72 FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,
73 FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,
74 FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,
75 FN_VI0_FIELD,
76
77 /* GPSR5 */
78 FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC,
79 FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,
80 FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,
81 FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,
82 FN_VI1_FIELD,
83
84 /* GPSR6 */
85 FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3,
86 FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7,
87 FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11,
88 FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15,
89 FN_IP2_16,
90
91 /* GPSR7 */
92 FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3,
93 FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7,
94 FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11,
95 FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14,
96 FN_VI3_FIELD,
97
98 /* GPSR8 */
99 FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2,
100 FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9,
101 FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17,
102 FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,
103
104 /* GPSR9 */
105 FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2,
106 FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,
107 FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10,
108 FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3,
109 FN_VI5_FIELD,
110
111 /* GPSR10 */
112 FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2,
113 FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1,
114 FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0,
115 FN_RTS0, FN_TX0, FN_RX0, FN_SCK1,
116 FN_CTS1, FN_RTS1, FN_TX1, FN_RX1,
117 FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,
118 FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX,
119 FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX,
120
121 /* GPSR11 */
122 FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6,
123 FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0,
124 FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD,
125 FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,
126 FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18,
127 FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP,
128 FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2,
129 FN_AVS1, FN_AVS2,
130
131 /* IPSR0 */
132 FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3,
133 FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7,
134 FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,
135 FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15,
136 FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1,
137 FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5,
138
139 /* IPSR1 */
140 FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DISP,
141 FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,
142 FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6,
143 FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10,
144 FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,
145 FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,
146
147 /* IPSR2 */
148 FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,
149 FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1,
150 FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,
151 FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,
152 FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,
153 FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,
154 FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,
155 FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,
156 FN_VI2_FIELD, FN_AVB_TXD2,
157
158 /* IPSR3 */
159 FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,
160 FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6,
161 FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,
162 FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,
163 FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,
164 FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,
165 FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
166 FN_VI3_D11_Y3,
167
168 /* IPSR4 */
169 FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,
170 FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
171 FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0,
172 FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0,
173 FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,
174 FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,
175 FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,
176 FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,
177
178 /* IPSR5 */
179 FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,
180 FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,
181 FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,
182 FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,
183 FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,
184 FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,
185
186 /* IPSR6 */
187 FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0,
188 FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,
189 FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1,
190 FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,
191 FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2,
192 FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3,
193 FN_TX3, FN_DREQ1, FN_RX3,
194
195 /* IPSR7 */
196 FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,
197 FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,
198 FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1,
199 FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,
200 FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,
201
202 FN_SEL_VI1_0, FN_SEL_VI1_1,
203 PINMUX_FUNCTION_END,
204
205 PINMUX_MARK_BEGIN,
206 DU1_DB2_C0_DATA12_MARK, DU1_DB3_C1_DATA13_MARK,
207 DU1_DB4_C2_DATA14_MARK, DU1_DB5_C3_DATA15_MARK,
208 DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK,
209 DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_DISP_MARK, DU1_CDE_MARK,
210
211 D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,
212 D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,
213 D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,
214 A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,
215 A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,
216 A14_MARK, A15_MARK,
217
218 A16_MARK, A17_MARK, A18_MARK, A19_MARK,
219 CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK,
220 EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK,
221 RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,
222 IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,
223
224 VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK,
225 VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,
226 VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,
227 VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,
228 VI0_FIELD_MARK,
229
230 VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_MARK,
231 VI1_VSYNC_MARK, VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,
232 VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK,
233 VI1_D5_B5_C5_MARK, VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,
234 VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK,
235 VI1_D11_G3_Y3_MARK, VI1_FIELD_MARK,
236
237 VI3_D10_Y2_MARK, VI3_FIELD_MARK,
238
239 VI4_CLK_MARK,
240
241 VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,
242
243 HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,
244 RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,
245 SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK,
246 CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK,
247
248 SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK,
249 SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
250 SD0_CD_MARK, SD0_WP_MARK, ADICLK_MARK,
251 ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK,
252 ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,
253
254 DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK,
255 DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK,
256 DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK,
257 DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK,
258 DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK,
259 DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK,
260 DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK,
261 DU0_DB5_C3_MARK, DU0_DB6_C4_MARK, DU0_DB7_C5_MARK,
262
263 DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
264 DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK,
265 DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK,
266 DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK,
267 DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK,
268 DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK,
269 A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,
270 A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,
271
272 VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,
273 VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK,
274 VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK,
275 VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,
276 VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,
277 VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,
278 VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,
279 VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK,
280 VI2_FIELD_MARK, AVB_TXD2_MARK,
281
282 VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,
283 VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK,
284 VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,
285 VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,
286 VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,
287 VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,
288 VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,
289 VI3_D11_Y3_MARK,
290
291 VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK,
292 VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK,
293 VI4_D1_C1_MARK, VI0_D16_R0_MARK, VI1_D12_G4_Y4_0_MARK,
294 VI4_D2_C2_MARK, VI0_D17_R1_MARK, VI1_D13_G5_Y5_0_MARK,
295 VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_0_MARK,
296 VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_0_MARK,
297 VI4_D5_C5_MARK, VI0_D20_R4_MARK, VI2_D12_Y4_MARK,
298 VI4_D6_C6_MARK, VI0_D21_R5_MARK, VI2_D13_Y5_MARK,
299 VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK,
300 VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK,
301 VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK,
302 VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,
303
304 VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK,
305 VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK,
306 VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK,
307 VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK,
308 VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK,
309 VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK,
310
311 MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK,
312 MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,
313 MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK,
314 MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,
315 DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK,
316 DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK,
317 TX3_MARK, DREQ1_MARK, RX3_MARK,
318
319 PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK,
320 PWM1_MARK, TCLK2_MARK, FSO_CFE_1_MARK,
321 PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK,
322 PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK,
323 SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK,
324 SSI_SCK4_MARK, TPU0TO3_MARK, SSI_WS4_MARK,
325 SSI_SDATA4_MARK, AUDIO_CLKOUT_MARK,
326 AUDIO_CLKA_MARK, AUDIO_CLKB_MARK,
327
328 PINMUX_MARK_END,
329 };
330
331 static pinmux_enum_t pinmux_data[] = {
332 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
333
334 PINMUX_DATA(DU1_DB2_C0_DATA12_MARK, FN_DU1_DB2_C0_DATA12),
335 PINMUX_DATA(DU1_DB3_C1_DATA13_MARK, FN_DU1_DB3_C1_DATA13),
336 PINMUX_DATA(DU1_DB4_C2_DATA14_MARK, FN_DU1_DB4_C2_DATA14),
337 PINMUX_DATA(DU1_DB5_C3_DATA15_MARK, FN_DU1_DB5_C3_DATA15),
338 PINMUX_DATA(DU1_DB6_C4_MARK, FN_DU1_DB6_C4),
339 PINMUX_DATA(DU1_DB7_C5_MARK, FN_DU1_DB7_C5),
340 PINMUX_DATA(DU1_EXHSYNC_DU1_HSYNC_MARK, FN_DU1_EXHSYNC_DU1_HSYNC),
341 PINMUX_DATA(DU1_EXVSYNC_DU1_VSYNC_MARK, FN_DU1_EXVSYNC_DU1_VSYNC),
342 PINMUX_DATA(DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE),
343 PINMUX_DATA(DU1_DISP_MARK, FN_DU1_DISP),
344 PINMUX_DATA(DU1_CDE_MARK, FN_DU1_CDE),
345
346 PINMUX_DATA(D0_MARK, FN_D0),
347 PINMUX_DATA(D1_MARK, FN_D1),
348 PINMUX_DATA(D2_MARK, FN_D2),
349 PINMUX_DATA(D3_MARK, FN_D3),
350 PINMUX_DATA(D4_MARK, FN_D4),
351 PINMUX_DATA(D5_MARK, FN_D5),
352 PINMUX_DATA(D6_MARK, FN_D6),
353 PINMUX_DATA(D7_MARK, FN_D7),
354 PINMUX_DATA(D8_MARK, FN_D8),
355 PINMUX_DATA(D9_MARK, FN_D9),
356 PINMUX_DATA(D10_MARK, FN_D10),
357 PINMUX_DATA(D11_MARK, FN_D11),
358 PINMUX_DATA(D12_MARK, FN_D12),
359 PINMUX_DATA(D13_MARK, FN_D13),
360 PINMUX_DATA(D14_MARK, FN_D14),
361 PINMUX_DATA(D15_MARK, FN_D15),
362 PINMUX_DATA(A0_MARK, FN_A0),
363 PINMUX_DATA(A1_MARK, FN_A1),
364 PINMUX_DATA(A2_MARK, FN_A2),
365 PINMUX_DATA(A3_MARK, FN_A3),
366 PINMUX_DATA(A4_MARK, FN_A4),
367 PINMUX_DATA(A5_MARK, FN_A5),
368 PINMUX_DATA(A6_MARK, FN_A6),
369 PINMUX_DATA(A7_MARK, FN_A7),
370 PINMUX_DATA(A8_MARK, FN_A8),
371 PINMUX_DATA(A9_MARK, FN_A9),
372 PINMUX_DATA(A10_MARK, FN_A10),
373 PINMUX_DATA(A11_MARK, FN_A11),
374 PINMUX_DATA(A12_MARK, FN_A12),
375 PINMUX_DATA(A13_MARK, FN_A13),
376 PINMUX_DATA(A14_MARK, FN_A14),
377 PINMUX_DATA(A15_MARK, FN_A15),
378
379 PINMUX_DATA(A16_MARK, FN_A16),
380 PINMUX_DATA(A17_MARK, FN_A17),
381 PINMUX_DATA(A18_MARK, FN_A18),
382 PINMUX_DATA(A19_MARK, FN_A19),
383 PINMUX_DATA(CS1_A26_MARK, FN_CS1_A26),
384 PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0),
385 PINMUX_DATA(EX_CS1_MARK, FN_EX_CS1),
386 PINMUX_DATA(EX_CS2_MARK, FN_EX_CS2),
387 PINMUX_DATA(EX_CS3_MARK, FN_EX_CS3),
388 PINMUX_DATA(EX_CS4_MARK, FN_EX_CS4),
389 PINMUX_DATA(EX_CS5_MARK, FN_EX_CS5),
390 PINMUX_DATA(BS_MARK, FN_BS),
391 PINMUX_DATA(RD_MARK, FN_RD),
392 PINMUX_DATA(RD_WR_MARK, FN_RD_WR),
393 PINMUX_DATA(WE0_MARK, FN_WE0),
394 PINMUX_DATA(WE1_MARK, FN_WE1),
395 PINMUX_DATA(EX_WAIT0_MARK, FN_EX_WAIT0),
396 PINMUX_DATA(IRQ0_MARK, FN_IRQ0),
397 PINMUX_DATA(IRQ1_MARK, FN_IRQ1),
398 PINMUX_DATA(IRQ2_MARK, FN_IRQ2),
399 PINMUX_DATA(IRQ3_MARK, FN_IRQ3),
400 PINMUX_DATA(CS0_MARK, FN_CS0),
401
402 PINMUX_DATA(VI0_CLK_MARK, FN_VI0_CLK),
403 PINMUX_DATA(VI0_CLKENB_MARK, FN_VI0_CLKENB),
404 PINMUX_DATA(VI0_HSYNC_MARK, FN_VI0_HSYNC),
405 PINMUX_DATA(VI0_VSYNC_MARK, FN_VI0_VSYNC),
406 PINMUX_DATA(VI0_D0_B0_C0_MARK, FN_VI0_D0_B0_C0),
407 PINMUX_DATA(VI0_D1_B1_C1_MARK, FN_VI0_D1_B1_C1),
408 PINMUX_DATA(VI0_D2_B2_C2_MARK, FN_VI0_D2_B2_C2),
409 PINMUX_DATA(VI0_D3_B3_C3_MARK, FN_VI0_D3_B3_C3),
410 PINMUX_DATA(VI0_D4_B4_C4_MARK, FN_VI0_D4_B4_C4),
411 PINMUX_DATA(VI0_D5_B5_C5_MARK, FN_VI0_D5_B5_C5),
412 PINMUX_DATA(VI0_D6_B6_C6_MARK, FN_VI0_D6_B6_C6),
413 PINMUX_DATA(VI0_D7_B7_C7_MARK, FN_VI0_D7_B7_C7),
414 PINMUX_DATA(VI0_D8_G0_Y0_MARK, FN_VI0_D8_G0_Y0),
415 PINMUX_DATA(VI0_D9_G1_Y1_MARK, FN_VI0_D9_G1_Y1),
416 PINMUX_DATA(VI0_D10_G2_Y2_MARK, FN_VI0_D10_G2_Y2),
417 PINMUX_DATA(VI0_D11_G3_Y3_MARK, FN_VI0_D11_G3_Y3),
418 PINMUX_DATA(VI0_FIELD_MARK, FN_VI0_FIELD),
419
420 PINMUX_DATA(VI1_CLK_MARK, FN_VI1_CLK),
421 PINMUX_DATA(VI1_CLKENB_MARK, FN_VI1_CLKENB),
422 PINMUX_DATA(VI1_HSYNC_MARK, FN_VI1_HSYNC),
423 PINMUX_DATA(VI1_VSYNC_MARK, FN_VI1_VSYNC),
424 PINMUX_DATA(VI1_D0_B0_C0_MARK, FN_VI1_D0_B0_C0),
425 PINMUX_DATA(VI1_D1_B1_C1_MARK, FN_VI1_D1_B1_C1),
426 PINMUX_DATA(VI1_D2_B2_C2_MARK, FN_VI1_D2_B2_C2),
427 PINMUX_DATA(VI1_D3_B3_C3_MARK, FN_VI1_D3_B3_C3),
428 PINMUX_DATA(VI1_D4_B4_C4_MARK, FN_VI1_D4_B4_C4),
429 PINMUX_DATA(VI1_D5_B5_C5_MARK, FN_VI1_D5_B5_C5),
430 PINMUX_DATA(VI1_D6_B6_C6_MARK, FN_VI1_D6_B6_C6),
431 PINMUX_DATA(VI1_D7_B7_C7_MARK, FN_VI1_D7_B7_C7),
432 PINMUX_DATA(VI1_D8_G0_Y0_MARK, FN_VI1_D8_G0_Y0),
433 PINMUX_DATA(VI1_D9_G1_Y1_MARK, FN_VI1_D9_G1_Y1),
434 PINMUX_DATA(VI1_D10_G2_Y2_MARK, FN_VI1_D10_G2_Y2),
435 PINMUX_DATA(VI1_D11_G3_Y3_MARK, FN_VI1_D11_G3_Y3),
436 PINMUX_DATA(VI1_FIELD_MARK, FN_VI1_FIELD),
437
438 PINMUX_DATA(VI3_D10_Y2_MARK, FN_VI3_D10_Y2),
439 PINMUX_DATA(VI3_FIELD_MARK, FN_VI3_FIELD),
440
441 PINMUX_DATA(VI4_CLK_MARK, FN_VI4_CLK),
442
443 PINMUX_DATA(VI5_CLK_MARK, FN_VI5_CLK),
444 PINMUX_DATA(VI5_D9_Y1_MARK, FN_VI5_D9_Y1),
445 PINMUX_DATA(VI5_D10_Y2_MARK, FN_VI5_D10_Y2),
446 PINMUX_DATA(VI5_D11_Y3_MARK, FN_VI5_D11_Y3),
447 PINMUX_DATA(VI5_FIELD_MARK, FN_VI5_FIELD),
448
449 PINMUX_DATA(HRTS0_MARK, FN_HRTS0),
450 PINMUX_DATA(HCTS1_MARK, FN_HCTS1),
451 PINMUX_DATA(SCK0_MARK, FN_SCK0),
452 PINMUX_DATA(CTS0_MARK, FN_CTS0),
453 PINMUX_DATA(RTS0_MARK, FN_RTS0),
454 PINMUX_DATA(TX0_MARK, FN_TX0),
455 PINMUX_DATA(RX0_MARK, FN_RX0),
456 PINMUX_DATA(SCK1_MARK, FN_SCK1),
457 PINMUX_DATA(CTS1_MARK, FN_CTS1),
458 PINMUX_DATA(RTS1_MARK, FN_RTS1),
459 PINMUX_DATA(TX1_MARK, FN_TX1),
460 PINMUX_DATA(RX1_MARK, FN_RX1),
461 PINMUX_DATA(SCIF_CLK_MARK, FN_SCIF_CLK),
462 PINMUX_DATA(CAN0_TX_MARK, FN_CAN0_TX),
463 PINMUX_DATA(CAN0_RX_MARK, FN_CAN0_RX),
464 PINMUX_DATA(CAN_CLK_MARK, FN_CAN_CLK),
465 PINMUX_DATA(CAN1_TX_MARK, FN_CAN1_TX),
466 PINMUX_DATA(CAN1_RX_MARK, FN_CAN1_RX),
467
468 PINMUX_DATA(SD0_CLK_MARK, FN_SD0_CLK),
469 PINMUX_DATA(SD0_CMD_MARK, FN_SD0_CMD),
470 PINMUX_DATA(SD0_DAT0_MARK, FN_SD0_DAT0),
471 PINMUX_DATA(SD0_DAT1_MARK, FN_SD0_DAT1),
472 PINMUX_DATA(SD0_DAT2_MARK, FN_SD0_DAT2),
473 PINMUX_DATA(SD0_DAT3_MARK, FN_SD0_DAT3),
474 PINMUX_DATA(SD0_CD_MARK, FN_SD0_CD),
475 PINMUX_DATA(SD0_WP_MARK, FN_SD0_WP),
476 PINMUX_DATA(ADICLK_MARK, FN_ADICLK),
477 PINMUX_DATA(ADICS_SAMP_MARK, FN_ADICS_SAMP),
478 PINMUX_DATA(ADIDATA_MARK, FN_ADIDATA),
479 PINMUX_DATA(ADICHS0_MARK, FN_ADICHS0),
480 PINMUX_DATA(ADICHS1_MARK, FN_ADICHS1),
481 PINMUX_DATA(ADICHS2_MARK, FN_ADICHS2),
482 PINMUX_DATA(AVS1_MARK, FN_AVS1),
483 PINMUX_DATA(AVS2_MARK, FN_AVS2),
484
485 PINMUX_IPSR_DATA(IP0_0, DU0_DR0_DATA0),
486 PINMUX_IPSR_DATA(IP0_1, DU0_DR1_DATA1),
487 PINMUX_IPSR_DATA(IP0_2, DU0_DR2_Y4_DATA2),
488 PINMUX_IPSR_DATA(IP0_3, DU0_DR3_Y5_DATA3),
489 PINMUX_IPSR_DATA(IP0_4, DU0_DR4_Y6_DATA4),
490 PINMUX_IPSR_DATA(IP0_5, DU0_DR5_Y7_DATA5),
491 PINMUX_IPSR_DATA(IP0_6, DU0_DR6_Y8_DATA6),
492 PINMUX_IPSR_DATA(IP0_7, DU0_DR7_Y9_DATA7),
493 PINMUX_IPSR_DATA(IP0_8, DU0_DG0_DATA8),
494 PINMUX_IPSR_DATA(IP0_9, DU0_DG1_DATA9),
495 PINMUX_IPSR_DATA(IP0_10, DU0_DG2_C6_DATA10),
496 PINMUX_IPSR_DATA(IP0_11, DU0_DG3_C7_DATA11),
497 PINMUX_IPSR_DATA(IP0_12, DU0_DG4_Y0_DATA12),
498 PINMUX_IPSR_DATA(IP0_13, DU0_DG5_Y1_DATA13),
499 PINMUX_IPSR_DATA(IP0_14, DU0_DG6_Y2_DATA14),
500 PINMUX_IPSR_DATA(IP0_15, DU0_DG7_Y3_DATA15),
501 PINMUX_IPSR_DATA(IP0_16, DU0_DB0),
502 PINMUX_IPSR_DATA(IP0_17, DU0_DB1),
503 PINMUX_IPSR_DATA(IP0_18, DU0_DB2_C0),
504 PINMUX_IPSR_DATA(IP0_19, DU0_DB3_C1),
505 PINMUX_IPSR_DATA(IP0_20, DU0_DB4_C2),
506 PINMUX_IPSR_DATA(IP0_21, DU0_DB5_C3),
507 PINMUX_IPSR_DATA(IP0_22, DU0_DB6_C4),
508 PINMUX_IPSR_DATA(IP0_23, DU0_DB7_C5),
509
510 PINMUX_IPSR_DATA(IP1_0, DU0_EXHSYNC_DU0_HSYNC),
511 PINMUX_IPSR_DATA(IP1_1, DU0_EXVSYNC_DU0_VSYNC),
512 PINMUX_IPSR_DATA(IP1_2, DU0_EXODDF_DU0_ODDF_DISP_CDE),
513 PINMUX_IPSR_DATA(IP1_3, DU0_DISP),
514 PINMUX_IPSR_DATA(IP1_4, DU0_CDE),
515 PINMUX_IPSR_DATA(IP1_5, DU1_DR2_Y4_DATA0),
516 PINMUX_IPSR_DATA(IP1_6, DU1_DR3_Y5_DATA1),
517 PINMUX_IPSR_DATA(IP1_7, DU1_DR4_Y6_DATA2),
518 PINMUX_IPSR_DATA(IP1_8, DU1_DR5_Y7_DATA3),
519 PINMUX_IPSR_DATA(IP1_9, DU1_DR6_DATA4),
520 PINMUX_IPSR_DATA(IP1_10, DU1_DR7_DATA5),
521 PINMUX_IPSR_DATA(IP1_11, DU1_DG2_C6_DATA6),
522 PINMUX_IPSR_DATA(IP1_12, DU1_DG3_C7_DATA7),
523 PINMUX_IPSR_DATA(IP1_13, DU1_DG4_Y0_DATA8),
524 PINMUX_IPSR_DATA(IP1_14, DU1_DG5_Y1_DATA9),
525 PINMUX_IPSR_DATA(IP1_15, DU1_DG6_Y2_DATA10),
526 PINMUX_IPSR_DATA(IP1_16, DU1_DG7_Y3_DATA11),
527 PINMUX_IPSR_DATA(IP1_17, A20),
528 PINMUX_IPSR_DATA(IP1_17, MOSI_IO0),
529 PINMUX_IPSR_DATA(IP1_18, A21),
530 PINMUX_IPSR_DATA(IP1_18, MISO_IO1),
531 PINMUX_IPSR_DATA(IP1_19, A22),
532 PINMUX_IPSR_DATA(IP1_19, IO2),
533 PINMUX_IPSR_DATA(IP1_20, A23),
534 PINMUX_IPSR_DATA(IP1_20, IO3),
535 PINMUX_IPSR_DATA(IP1_21, A24),
536 PINMUX_IPSR_DATA(IP1_21, SPCLK),
537 PINMUX_IPSR_DATA(IP1_22, A25),
538 PINMUX_IPSR_DATA(IP1_22, SSL),
539
540 PINMUX_IPSR_DATA(IP2_0, VI2_CLK),
541 PINMUX_IPSR_DATA(IP2_0, AVB_RX_CLK),
542 PINMUX_IPSR_DATA(IP2_1, VI2_CLKENB),
543 PINMUX_IPSR_DATA(IP2_1, AVB_RX_DV),
544 PINMUX_IPSR_DATA(IP2_2, VI2_HSYNC),
545 PINMUX_IPSR_DATA(IP2_2, AVB_RXD0),
546 PINMUX_IPSR_DATA(IP2_3, VI2_VSYNC),
547 PINMUX_IPSR_DATA(IP2_3, AVB_RXD1),
548 PINMUX_IPSR_DATA(IP2_4, VI2_D0_C0),
549 PINMUX_IPSR_DATA(IP2_4, AVB_RXD2),
550 PINMUX_IPSR_DATA(IP2_5, VI2_D1_C1),
551 PINMUX_IPSR_DATA(IP2_5, AVB_RXD3),
552 PINMUX_IPSR_DATA(IP2_6, VI2_D2_C2),
553 PINMUX_IPSR_DATA(IP2_6, AVB_RXD4),
554 PINMUX_IPSR_DATA(IP2_7, VI2_D3_C3),
555 PINMUX_IPSR_DATA(IP2_7, AVB_RXD5),
556 PINMUX_IPSR_DATA(IP2_8, VI2_D4_C4),
557 PINMUX_IPSR_DATA(IP2_8, AVB_RXD6),
558 PINMUX_IPSR_DATA(IP2_9, VI2_D5_C5),
559 PINMUX_IPSR_DATA(IP2_9, AVB_RXD7),
560 PINMUX_IPSR_DATA(IP2_10, VI2_D6_C6),
561 PINMUX_IPSR_DATA(IP2_10, AVB_RX_ER),
562 PINMUX_IPSR_DATA(IP2_11, VI2_D7_C7),
563 PINMUX_IPSR_DATA(IP2_11, AVB_COL),
564 PINMUX_IPSR_DATA(IP2_12, VI2_D8_Y0),
565 PINMUX_IPSR_DATA(IP2_12, AVB_TXD3),
566 PINMUX_IPSR_DATA(IP2_13, VI2_D9_Y1),
567 PINMUX_IPSR_DATA(IP2_13, AVB_TX_EN),
568 PINMUX_IPSR_DATA(IP2_14, VI2_D10_Y2),
569 PINMUX_IPSR_DATA(IP2_14, AVB_TXD0),
570 PINMUX_IPSR_DATA(IP2_15, VI2_D11_Y3),
571 PINMUX_IPSR_DATA(IP2_15, AVB_TXD1),
572 PINMUX_IPSR_DATA(IP2_16, VI2_FIELD),
573 PINMUX_IPSR_DATA(IP2_16, AVB_TXD2),
574
575 PINMUX_IPSR_DATA(IP3_0, VI3_CLK),
576 PINMUX_IPSR_DATA(IP3_0, AVB_TX_CLK),
577 PINMUX_IPSR_DATA(IP3_1, VI3_CLKENB),
578 PINMUX_IPSR_DATA(IP3_1, AVB_TXD4),
579 PINMUX_IPSR_DATA(IP3_2, VI3_HSYNC),
580 PINMUX_IPSR_DATA(IP3_2, AVB_TXD5),
581 PINMUX_IPSR_DATA(IP3_3, VI3_VSYNC),
582 PINMUX_IPSR_DATA(IP3_3, AVB_TXD6),
583 PINMUX_IPSR_DATA(IP3_4, VI3_D0_C0),
584 PINMUX_IPSR_DATA(IP3_4, AVB_TXD7),
585 PINMUX_IPSR_DATA(IP3_5, VI3_D1_C1),
586 PINMUX_IPSR_DATA(IP3_5, AVB_TX_ER),
587 PINMUX_IPSR_DATA(IP3_6, VI3_D2_C2),
588 PINMUX_IPSR_DATA(IP3_6, AVB_GTX_CLK),
589 PINMUX_IPSR_DATA(IP3_7, VI3_D3_C3),
590 PINMUX_IPSR_DATA(IP3_7, AVB_MDC),
591 PINMUX_IPSR_DATA(IP3_8, VI3_D4_C4),
592 PINMUX_IPSR_DATA(IP3_8, AVB_MDIO),
593 PINMUX_IPSR_DATA(IP3_9, VI3_D5_C5),
594 PINMUX_IPSR_DATA(IP3_9, AVB_LINK),
595 PINMUX_IPSR_DATA(IP3_10, VI3_D6_C6),
596 PINMUX_IPSR_DATA(IP3_10, AVB_MAGIC),
597 PINMUX_IPSR_DATA(IP3_11, VI3_D7_C7),
598 PINMUX_IPSR_DATA(IP3_11, AVB_PHY_INT),
599 PINMUX_IPSR_DATA(IP3_12, VI3_D8_Y0),
600 PINMUX_IPSR_DATA(IP3_12, AVB_CRS),
601 PINMUX_IPSR_DATA(IP3_13, VI3_D9_Y1),
602 PINMUX_IPSR_DATA(IP3_13, AVB_GTXREFCLK),
603 PINMUX_IPSR_DATA(IP3_14, VI3_D11_Y3),
604
605 PINMUX_IPSR_DATA(IP4_0, VI4_CLKENB),
606 PINMUX_IPSR_DATA(IP4_0, VI0_D12_G4_Y4),
607 PINMUX_IPSR_DATA(IP4_1, VI4_HSYNC),
608 PINMUX_IPSR_DATA(IP4_1, VI0_D13_G5_Y5),
609 PINMUX_IPSR_DATA(IP4_3_2, VI4_VSYNC),
610 PINMUX_IPSR_DATA(IP4_3_2, VI0_D14_G6_Y6),
611 PINMUX_IPSR_DATA(IP4_4, VI4_D0_C0),
612 PINMUX_IPSR_DATA(IP4_4, VI0_D15_G7_Y7),
613 PINMUX_IPSR_DATA(IP4_6_5, VI4_D1_C1),
614 PINMUX_IPSR_DATA(IP4_6_5, VI0_D16_R0),
615 PINMUX_IPSR_MODSEL_DATA(IP4_6_5, VI1_D12_G4_Y4_0, SEL_VI1_0),
616 PINMUX_IPSR_DATA(IP4_8_7, VI4_D2_C2),
617 PINMUX_IPSR_DATA(IP4_8_7, VI0_D17_R1),
618 PINMUX_IPSR_MODSEL_DATA(IP4_8_7, VI1_D13_G5_Y5_0, SEL_VI1_0),
619 PINMUX_IPSR_DATA(IP4_10_9, VI4_D3_C3),
620 PINMUX_IPSR_DATA(IP4_10_9, VI0_D18_R2),
621 PINMUX_IPSR_MODSEL_DATA(IP4_10_9, VI1_D14_G6_Y6_0, SEL_VI1_0),
622 PINMUX_IPSR_DATA(IP4_12_11, VI4_D4_C4),
623 PINMUX_IPSR_DATA(IP4_12_11, VI0_D19_R3),
624 PINMUX_IPSR_MODSEL_DATA(IP4_12_11, VI1_D15_G7_Y7_0, SEL_VI1_0),
625 PINMUX_IPSR_DATA(IP4_14_13, VI4_D5_C5),
626 PINMUX_IPSR_DATA(IP4_14_13, VI0_D20_R4),
627 PINMUX_IPSR_DATA(IP4_14_13, VI2_D12_Y4),
628 PINMUX_IPSR_DATA(IP4_16_15, VI4_D6_C6),
629 PINMUX_IPSR_DATA(IP4_16_15, VI0_D21_R5),
630 PINMUX_IPSR_DATA(IP4_16_15, VI2_D13_Y5),
631 PINMUX_IPSR_DATA(IP4_18_17, VI4_D7_C7),
632 PINMUX_IPSR_DATA(IP4_18_17, VI0_D22_R6),
633 PINMUX_IPSR_DATA(IP4_18_17, VI2_D14_Y6),
634 PINMUX_IPSR_DATA(IP4_20_19, VI4_D8_Y0),
635 PINMUX_IPSR_DATA(IP4_20_19, VI0_D23_R7),
636 PINMUX_IPSR_DATA(IP4_20_19, VI2_D15_Y7),
637 PINMUX_IPSR_DATA(IP4_21, VI4_D9_Y1),
638 PINMUX_IPSR_DATA(IP4_21, VI3_D12_Y4),
639 PINMUX_IPSR_DATA(IP4_22, VI4_D10_Y2),
640 PINMUX_IPSR_DATA(IP4_22, VI3_D13_Y5),
641 PINMUX_IPSR_DATA(IP4_23, VI4_D11_Y3),
642 PINMUX_IPSR_DATA(IP4_23, VI3_D14_Y6),
643 PINMUX_IPSR_DATA(IP4_24, VI4_FIELD),
644 PINMUX_IPSR_DATA(IP4_24, VI3_D15_Y7),
645
646 PINMUX_IPSR_DATA(IP5_0, VI5_CLKENB),
647 PINMUX_IPSR_MODSEL_DATA(IP5_0, VI1_D12_G4_Y4_1, SEL_VI1_1),
648 PINMUX_IPSR_DATA(IP5_1, VI5_HSYNC),
649 PINMUX_IPSR_MODSEL_DATA(IP5_1, VI1_D13_G5_Y5_1, SEL_VI1_1),
650 PINMUX_IPSR_DATA(IP5_2, VI5_VSYNC),
651 PINMUX_IPSR_MODSEL_DATA(IP5_2, VI1_D14_G6_Y6_1, SEL_VI1_1),
652 PINMUX_IPSR_DATA(IP5_3, VI5_D0_C0),
653 PINMUX_IPSR_MODSEL_DATA(IP5_3, VI1_D15_G7_Y7_1, SEL_VI1_1),
654 PINMUX_IPSR_DATA(IP5_4, VI5_D1_C1),
655 PINMUX_IPSR_DATA(IP5_4, VI1_D16_R0),
656 PINMUX_IPSR_DATA(IP5_5, VI5_D2_C2),
657 PINMUX_IPSR_DATA(IP5_5, VI1_D17_R1),
658 PINMUX_IPSR_DATA(IP5_6, VI5_D3_C3),
659 PINMUX_IPSR_DATA(IP5_6, VI1_D18_R2),
660 PINMUX_IPSR_DATA(IP5_7, VI5_D4_C4),
661 PINMUX_IPSR_DATA(IP5_7, VI1_D19_R3),
662 PINMUX_IPSR_DATA(IP5_8, VI5_D5_C5),
663 PINMUX_IPSR_DATA(IP5_8, VI1_D20_R4),
664 PINMUX_IPSR_DATA(IP5_9, VI5_D6_C6),
665 PINMUX_IPSR_DATA(IP5_9, VI1_D21_R5),
666 PINMUX_IPSR_DATA(IP5_10, VI5_D7_C7),
667 PINMUX_IPSR_DATA(IP5_10, VI1_D22_R6),
668 PINMUX_IPSR_DATA(IP5_11, VI5_D8_Y0),
669 PINMUX_IPSR_DATA(IP5_11, VI1_D23_R7),
670
671 PINMUX_IPSR_DATA(IP6_0, MSIOF0_SCK),
672 PINMUX_IPSR_DATA(IP6_0, HSCK0),
673 PINMUX_IPSR_DATA(IP6_1, MSIOF0_SYNC),
674 PINMUX_IPSR_DATA(IP6_1, HCTS0),
675 PINMUX_IPSR_DATA(IP6_2, MSIOF0_TXD),
676 PINMUX_IPSR_DATA(IP6_2, HTX0),
677 PINMUX_IPSR_DATA(IP6_3, MSIOF0_RXD),
678 PINMUX_IPSR_DATA(IP6_3, HRX0),
679 PINMUX_IPSR_DATA(IP6_4, MSIOF1_SCK),
680 PINMUX_IPSR_DATA(IP6_4, HSCK1),
681 PINMUX_IPSR_DATA(IP6_5, MSIOF1_SYNC),
682 PINMUX_IPSR_DATA(IP6_5, HRTS1),
683 PINMUX_IPSR_DATA(IP6_6, MSIOF1_TXD),
684 PINMUX_IPSR_DATA(IP6_6, HTX1),
685 PINMUX_IPSR_DATA(IP6_7, MSIOF1_RXD),
686 PINMUX_IPSR_DATA(IP6_7, HRX1),
687 PINMUX_IPSR_DATA(IP6_9_8, DRACK0),
688 PINMUX_IPSR_DATA(IP6_9_8, SCK2),
689 PINMUX_IPSR_DATA(IP6_11_10, DACK0),
690 PINMUX_IPSR_DATA(IP6_11_10, TX2),
691 PINMUX_IPSR_DATA(IP6_13_12, DREQ0),
692 PINMUX_IPSR_DATA(IP6_13_12, RX2),
693 PINMUX_IPSR_DATA(IP6_15_14, DACK1),
694 PINMUX_IPSR_DATA(IP6_15_14, SCK3),
695 PINMUX_IPSR_DATA(IP6_16, TX3),
696 PINMUX_IPSR_DATA(IP6_18_17, DREQ1),
697 PINMUX_IPSR_DATA(IP6_18_17, RX3),
698
699 PINMUX_IPSR_DATA(IP7_1_0, PWM0),
700 PINMUX_IPSR_DATA(IP7_1_0, TCLK1),
701 PINMUX_IPSR_DATA(IP7_1_0, FSO_CFE_0),
702 PINMUX_IPSR_DATA(IP7_3_2, PWM1),
703 PINMUX_IPSR_DATA(IP7_3_2, TCLK2),
704 PINMUX_IPSR_DATA(IP7_3_2, FSO_CFE_1),
705 PINMUX_IPSR_DATA(IP7_5_4, PWM2),
706 PINMUX_IPSR_DATA(IP7_5_4, TCLK3),
707 PINMUX_IPSR_DATA(IP7_5_4, FSO_TOE),
708 PINMUX_IPSR_DATA(IP7_6, PWM3),
709 PINMUX_IPSR_DATA(IP7_7, PWM4),
710 PINMUX_IPSR_DATA(IP7_9_8, SSI_SCK3),
711 PINMUX_IPSR_DATA(IP7_9_8, TPU0TO0),
712 PINMUX_IPSR_DATA(IP7_11_10, SSI_WS3),
713 PINMUX_IPSR_DATA(IP7_11_10, TPU0TO1),
714 PINMUX_IPSR_DATA(IP7_13_12, SSI_SDATA3),
715 PINMUX_IPSR_DATA(IP7_13_12, TPU0TO2),
716 PINMUX_IPSR_DATA(IP7_15_14, SSI_SCK4),
717 PINMUX_IPSR_DATA(IP7_15_14, TPU0TO3),
718 PINMUX_IPSR_DATA(IP7_16, SSI_WS4),
719 PINMUX_IPSR_DATA(IP7_17, SSI_SDATA4),
720 PINMUX_IPSR_DATA(IP7_18, AUDIO_CLKOUT),
721 PINMUX_IPSR_DATA(IP7_19, AUDIO_CLKA),
722 PINMUX_IPSR_DATA(IP7_20, AUDIO_CLKB),
723 };
724
725 static struct pinmux_gpio pinmux_gpios[] = {
726 PINMUX_GPIO_GP_ALL(),
727
728 GPIO_FN(DU1_DB2_C0_DATA12), GPIO_FN(DU1_DB3_C1_DATA13),
729 GPIO_FN(DU1_DB4_C2_DATA14), GPIO_FN(DU1_DB5_C3_DATA15),
730 GPIO_FN(DU1_DB6_C4), GPIO_FN(DU1_DB7_C5),
731 GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC),
732 GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), GPIO_FN(DU1_DISP), GPIO_FN(DU1_CDE),
733
734 GPIO_FN(D0), GPIO_FN(D1), GPIO_FN(D2), GPIO_FN(D3),
735 GPIO_FN(D4), GPIO_FN(D5), GPIO_FN(D6), GPIO_FN(D7),
736 GPIO_FN(D8), GPIO_FN(D9), GPIO_FN(D10), GPIO_FN(D11),
737 GPIO_FN(D12), GPIO_FN(D13), GPIO_FN(D14), GPIO_FN(D15),
738 GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2), GPIO_FN(A3),
739 GPIO_FN(A4), GPIO_FN(A5), GPIO_FN(A6), GPIO_FN(A7),
740 GPIO_FN(A8), GPIO_FN(A9), GPIO_FN(A10), GPIO_FN(A11),
741 GPIO_FN(A12), GPIO_FN(A13), GPIO_FN(A14), GPIO_FN(A15),
742
743 GPIO_FN(A16), GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(A19),
744 GPIO_FN(CS1_A26), GPIO_FN(EX_CS0), GPIO_FN(EX_CS1), GPIO_FN(EX_CS2),
745 GPIO_FN(EX_CS3), GPIO_FN(EX_CS4), GPIO_FN(EX_CS5), GPIO_FN(BS),
746 GPIO_FN(RD), GPIO_FN(RD_WR), GPIO_FN(WE0), GPIO_FN(WE1),
747 GPIO_FN(EX_WAIT0), GPIO_FN(IRQ0), GPIO_FN(IRQ1), GPIO_FN(IRQ2),
748 GPIO_FN(IRQ3), GPIO_FN(CS0),
749
750 GPIO_FN(VI0_CLK), GPIO_FN(VI0_CLKENB), GPIO_FN(VI0_HSYNC),
751 GPIO_FN(VI0_VSYNC), GPIO_FN(VI0_D0_B0_C0), GPIO_FN(VI0_D1_B1_C1),
752 GPIO_FN(VI0_D2_B2_C2), GPIO_FN(VI0_D3_B3_C3), GPIO_FN(VI0_D4_B4_C4),
753 GPIO_FN(VI0_D5_B5_C5), GPIO_FN(VI0_D6_B6_C6), GPIO_FN(VI0_D7_B7_C7),
754 GPIO_FN(VI0_D8_G0_Y0), GPIO_FN(VI0_D9_G1_Y1), GPIO_FN(VI0_D10_G2_Y2),
755 GPIO_FN(VI0_D11_G3_Y3), GPIO_FN(VI0_FIELD),
756
757 GPIO_FN(VI1_CLK), GPIO_FN(VI1_CLKENB), GPIO_FN(VI1_HSYNC),
758 GPIO_FN(VI1_VSYNC), GPIO_FN(VI1_D0_B0_C0), GPIO_FN(VI1_D1_B1_C1),
759 GPIO_FN(VI1_D2_B2_C2), GPIO_FN(VI1_D3_B3_C3), GPIO_FN(VI1_D4_B4_C4),
760 GPIO_FN(VI1_D5_B5_C5), GPIO_FN(VI1_D6_B6_C6), GPIO_FN(VI1_D7_B7_C7),
761 GPIO_FN(VI1_D8_G0_Y0), GPIO_FN(VI1_D9_G1_Y1), GPIO_FN(VI1_D10_G2_Y2),
762 GPIO_FN(VI1_D11_G3_Y3), GPIO_FN(VI1_FIELD),
763
764 GPIO_FN(VI3_D10_Y2), GPIO_FN(VI3_FIELD),
765
766 GPIO_FN(VI4_CLK),
767
768 GPIO_FN(VI5_CLK), GPIO_FN(VI5_D9_Y1), GPIO_FN(VI5_D10_Y2),
769 GPIO_FN(VI5_D11_Y3), GPIO_FN(VI5_FIELD),
770
771 GPIO_FN(HRTS0), GPIO_FN(HCTS1), GPIO_FN(SCK0), GPIO_FN(CTS0),
772 GPIO_FN(RTS0), GPIO_FN(TX0), GPIO_FN(RX0), GPIO_FN(SCK1),
773 GPIO_FN(CTS1), GPIO_FN(RTS1), GPIO_FN(TX1), GPIO_FN(RX1),
774 GPIO_FN(SCIF_CLK), GPIO_FN(CAN0_TX), GPIO_FN(CAN0_RX), GPIO_FN(CAN_CLK),
775 GPIO_FN(CAN1_TX), GPIO_FN(CAN1_RX),
776
777 GPIO_FN(SD0_CLK), GPIO_FN(SD0_CMD), GPIO_FN(SD0_DAT0),
778 GPIO_FN(SD0_DAT1), GPIO_FN(SD0_DAT2), GPIO_FN(SD0_DAT3),
779 GPIO_FN(SD0_CD), GPIO_FN(SD0_WP), GPIO_FN(ADICLK),
780 GPIO_FN(ADICS_SAMP), GPIO_FN(ADIDATA), GPIO_FN(ADICHS0),
781 GPIO_FN(ADICHS1), GPIO_FN(ADICHS2), GPIO_FN(AVS1),
782 GPIO_FN(AVS2),
783
784 GPIO_FN(DU0_DR0_DATA0), GPIO_FN(DU0_DR1_DATA1),
785 GPIO_FN(DU0_DR2_Y4_DATA2), GPIO_FN(DU0_DR3_Y5_DATA3),
786 GPIO_FN(DU0_DR4_Y6_DATA4), GPIO_FN(DU0_DR5_Y7_DATA5),
787 GPIO_FN(DU0_DR6_Y8_DATA6), GPIO_FN(DU0_DR7_Y9_DATA7),
788 GPIO_FN(DU0_DG0_DATA8), GPIO_FN(DU0_DG1_DATA9),
789 GPIO_FN(DU0_DG2_C6_DATA10), GPIO_FN(DU0_DG3_C7_DATA11),
790 GPIO_FN(DU0_DG4_Y0_DATA12), GPIO_FN(DU0_DG5_Y1_DATA13),
791 GPIO_FN(DU0_DG6_Y2_DATA14), GPIO_FN(DU0_DG7_Y3_DATA15),
792 GPIO_FN(DU0_DB0), GPIO_FN(DU0_DB1),
793 GPIO_FN(DU0_DB2_C0), GPIO_FN(DU0_DB3_C1), GPIO_FN(DU0_DB4_C2),
794 GPIO_FN(DU0_DB5_C3), GPIO_FN(DU0_DB6_C4), GPIO_FN(DU0_DB7_C5),
795
796 GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(DU0_EXVSYNC_DU0_VSYNC),
797 GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(DU0_DISP),
798 GPIO_FN(DU0_CDE), GPIO_FN(DU1_DR2_Y4_DATA0), GPIO_FN(DU1_DR3_Y5_DATA1),
799 GPIO_FN(DU1_DR4_Y6_DATA2), GPIO_FN(DU1_DR5_Y7_DATA3),
800 GPIO_FN(DU1_DR6_DATA4), GPIO_FN(DU1_DR7_DATA5),
801 GPIO_FN(DU1_DG2_C6_DATA6), GPIO_FN(DU1_DG3_C7_DATA7),
802 GPIO_FN(DU1_DG4_Y0_DATA8), GPIO_FN(DU1_DG5_Y1_DATA9),
803 GPIO_FN(DU1_DG6_Y2_DATA10), GPIO_FN(DU1_DG7_Y3_DATA11),
804 GPIO_FN(A20), GPIO_FN(MOSI_IO0), GPIO_FN(A21), GPIO_FN(MISO_IO1),
805 GPIO_FN(A22), GPIO_FN(IO2), GPIO_FN(A23), GPIO_FN(IO3),
806 GPIO_FN(A24), GPIO_FN(SPCLK), GPIO_FN(A25), GPIO_FN(SSL),
807
808 GPIO_FN(VI2_CLK), GPIO_FN(AVB_RX_CLK), GPIO_FN(VI2_CLKENB),
809 GPIO_FN(AVB_RX_DV), GPIO_FN(VI2_HSYNC), GPIO_FN(AVB_RXD0),
810 GPIO_FN(VI2_VSYNC), GPIO_FN(AVB_RXD1), GPIO_FN(VI2_D0_C0),
811 GPIO_FN(AVB_RXD2), GPIO_FN(VI2_D1_C1), GPIO_FN(AVB_RXD3),
812 GPIO_FN(VI2_D2_C2), GPIO_FN(AVB_RXD4), GPIO_FN(VI2_D3_C3),
813 GPIO_FN(AVB_RXD5), GPIO_FN(VI2_D4_C4), GPIO_FN(AVB_RXD6),
814 GPIO_FN(VI2_D5_C5), GPIO_FN(AVB_RXD7), GPIO_FN(VI2_D6_C6),
815 GPIO_FN(AVB_RX_ER), GPIO_FN(VI2_D7_C7), GPIO_FN(AVB_COL),
816 GPIO_FN(VI2_D8_Y0), GPIO_FN(AVB_TXD3), GPIO_FN(VI2_D9_Y1),
817 GPIO_FN(AVB_TX_EN), GPIO_FN(VI2_D10_Y2), GPIO_FN(AVB_TXD0),
818 GPIO_FN(VI2_D11_Y3), GPIO_FN(AVB_TXD1), GPIO_FN(VI2_FIELD),
819 GPIO_FN(AVB_TXD2),
820
821 GPIO_FN(VI3_CLK), GPIO_FN(AVB_TX_CLK), GPIO_FN(VI3_CLKENB),
822 GPIO_FN(AVB_TXD4), GPIO_FN(VI3_HSYNC), GPIO_FN(AVB_TXD5),
823 GPIO_FN(VI3_VSYNC), GPIO_FN(AVB_TXD6), GPIO_FN(VI3_D0_C0),
824 GPIO_FN(AVB_TXD7), GPIO_FN(VI3_D1_C1), GPIO_FN(AVB_TX_ER),
825 GPIO_FN(VI3_D2_C2), GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI3_D3_C3),
826 GPIO_FN(AVB_MDC), GPIO_FN(VI3_D4_C4), GPIO_FN(AVB_MDIO),
827 GPIO_FN(VI3_D5_C5), GPIO_FN(AVB_LINK), GPIO_FN(VI3_D6_C6),
828 GPIO_FN(AVB_MAGIC), GPIO_FN(VI3_D7_C7), GPIO_FN(AVB_PHY_INT),
829 GPIO_FN(VI3_D8_Y0), GPIO_FN(AVB_CRS), GPIO_FN(VI3_D9_Y1),
830 GPIO_FN(AVB_GTXREFCLK), GPIO_FN(VI3_D11_Y3),
831
832 GPIO_FN(VI4_CLKENB), GPIO_FN(VI0_D12_G4_Y4), GPIO_FN(VI4_HSYNC),
833 GPIO_FN(VI0_D13_G5_Y5), GPIO_FN(VI4_VSYNC), GPIO_FN(VI0_D14_G6_Y6),
834 GPIO_FN(VI4_D0_C0), GPIO_FN(VI0_D15_G7_Y7), GPIO_FN(VI4_D1_C1),
835 GPIO_FN(VI0_D16_R0), GPIO_FN(VI1_D12_G4_Y4_0), GPIO_FN(VI4_D2_C2),
836 GPIO_FN(VI0_D17_R1), GPIO_FN(VI1_D13_G5_Y5_0), GPIO_FN(VI4_D3_C3),
837 GPIO_FN(VI0_D18_R2), GPIO_FN(VI1_D14_G6_Y6_0), GPIO_FN(VI4_D4_C4),
838 GPIO_FN(VI0_D19_R3), GPIO_FN(VI1_D15_G7_Y7_0), GPIO_FN(VI4_D5_C5),
839 GPIO_FN(VI0_D20_R4), GPIO_FN(VI2_D12_Y4), GPIO_FN(VI4_D6_C6),
840 GPIO_FN(VI0_D21_R5), GPIO_FN(VI2_D13_Y5), GPIO_FN(VI4_D7_C7),
841 GPIO_FN(VI0_D22_R6), GPIO_FN(VI2_D14_Y6), GPIO_FN(VI4_D8_Y0),
842 GPIO_FN(VI0_D23_R7), GPIO_FN(VI2_D15_Y7), GPIO_FN(VI4_D9_Y1),
843 GPIO_FN(VI3_D12_Y4), GPIO_FN(VI4_D10_Y2), GPIO_FN(VI3_D13_Y5),
844 GPIO_FN(VI4_D11_Y3), GPIO_FN(VI3_D14_Y6), GPIO_FN(VI4_FIELD),
845 GPIO_FN(VI3_D15_Y7),
846
847 GPIO_FN(VI5_CLKENB), GPIO_FN(VI1_D12_G4_Y4_1), GPIO_FN(VI5_HSYNC),
848 GPIO_FN(VI1_D13_G5_Y5_1), GPIO_FN(VI5_VSYNC), GPIO_FN(VI1_D14_G6_Y6_1),
849 GPIO_FN(VI5_D0_C0), GPIO_FN(VI1_D15_G7_Y7_1), GPIO_FN(VI5_D1_C1),
850 GPIO_FN(VI1_D16_R0), GPIO_FN(VI5_D2_C2), GPIO_FN(VI1_D17_R1),
851 GPIO_FN(VI5_D3_C3), GPIO_FN(VI1_D18_R2), GPIO_FN(VI5_D4_C4),
852 GPIO_FN(VI1_D19_R3), GPIO_FN(VI5_D5_C5), GPIO_FN(VI1_D20_R4),
853 GPIO_FN(VI5_D6_C6), GPIO_FN(VI1_D21_R5), GPIO_FN(VI5_D7_C7),
854 GPIO_FN(VI1_D22_R6), GPIO_FN(VI5_D8_Y0), GPIO_FN(VI1_D23_R7),
855
856 GPIO_FN(MSIOF0_SCK), GPIO_FN(HSCK0), GPIO_FN(MSIOF0_SYNC),
857 GPIO_FN(HCTS0), GPIO_FN(MSIOF0_TXD), GPIO_FN(HTX0),
858 GPIO_FN(MSIOF0_RXD), GPIO_FN(HRX0), GPIO_FN(MSIOF1_SCK),
859 GPIO_FN(HSCK1), GPIO_FN(MSIOF1_SYNC), GPIO_FN(HRTS1),
860 GPIO_FN(MSIOF1_TXD), GPIO_FN(HTX1), GPIO_FN(MSIOF1_RXD),
861 GPIO_FN(HRX1), GPIO_FN(DRACK0), GPIO_FN(SCK2),
862 GPIO_FN(DACK0), GPIO_FN(TX2), GPIO_FN(DREQ0),
863 GPIO_FN(RX2), GPIO_FN(DACK1), GPIO_FN(SCK3),
864 GPIO_FN(TX3), GPIO_FN(DREQ1), GPIO_FN(RX3),
865
866 GPIO_FN(PWM0), GPIO_FN(TCLK1), GPIO_FN(FSO_CFE_0),
867 GPIO_FN(PWM1), GPIO_FN(TCLK2), GPIO_FN(FSO_CFE_1),
868 GPIO_FN(PWM2), GPIO_FN(TCLK3), GPIO_FN(FSO_TOE),
869 GPIO_FN(PWM3), GPIO_FN(PWM4),
870 GPIO_FN(SSI_SCK3), GPIO_FN(TPU0TO0),
871 GPIO_FN(SSI_WS3), GPIO_FN(TPU0TO1),
872 GPIO_FN(SSI_SDATA3), GPIO_FN(TPU0TO2),
873 GPIO_FN(SSI_SCK4), GPIO_FN(TPU0TO3),
874 GPIO_FN(SSI_WS4), GPIO_FN(SSI_SDATA4),
875 GPIO_FN(AUDIO_CLKOUT), GPIO_FN(AUDIO_CLKA), GPIO_FN(AUDIO_CLKB),
876
877 };
878
879 static struct pinmux_cfg_reg pinmux_config_regs[] = {
880 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
881 0, 0,
882 0, 0,
883 0, 0,
884 GP_0_28_FN, FN_IP1_4,
885 GP_0_27_FN, FN_IP1_3,
886 GP_0_26_FN, FN_IP1_2,
887 GP_0_25_FN, FN_IP1_1,
888 GP_0_24_FN, FN_IP1_0,
889 GP_0_23_FN, FN_IP0_23,
890 GP_0_22_FN, FN_IP0_22,
891 GP_0_21_FN, FN_IP0_21,
892 GP_0_20_FN, FN_IP0_20,
893 GP_0_19_FN, FN_IP0_19,
894 GP_0_18_FN, FN_IP0_18,
895 GP_0_17_FN, FN_IP0_17,
896 GP_0_16_FN, FN_IP0_16,
897 GP_0_15_FN, FN_IP0_15,
898 GP_0_14_FN, FN_IP0_14,
899 GP_0_13_FN, FN_IP0_13,
900 GP_0_12_FN, FN_IP0_12,
901 GP_0_11_FN, FN_IP0_11,
902 GP_0_10_FN, FN_IP0_10,
903 GP_0_9_FN, FN_IP0_9,
904 GP_0_8_FN, FN_IP0_8,
905 GP_0_7_FN, FN_IP0_7,
906 GP_0_6_FN, FN_IP0_6,
907 GP_0_5_FN, FN_IP0_5,
908 GP_0_4_FN, FN_IP0_4,
909 GP_0_3_FN, FN_IP0_3,
910 GP_0_2_FN, FN_IP0_2,
911 GP_0_1_FN, FN_IP0_1,
912 GP_0_0_FN, FN_IP0_0 }
913 },
914 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
915 0, 0,
916 0, 0,
917 0, 0,
918 0, 0,
919 0, 0,
920 0, 0,
921 0, 0,
922 0, 0,
923 0, 0,
924 GP_1_22_FN, FN_DU1_CDE,
925 GP_1_21_FN, FN_DU1_DISP,
926 GP_1_20_FN, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,
927 GP_1_19_FN, FN_DU1_EXVSYNC_DU1_VSYNC,
928 GP_1_18_FN, FN_DU1_EXHSYNC_DU1_HSYNC,
929 GP_1_17_FN, FN_DU1_DB7_C5,
930 GP_1_16_FN, FN_DU1_DB6_C4,
931 GP_1_15_FN, FN_DU1_DB5_C3_DATA15,
932 GP_1_14_FN, FN_DU1_DB4_C2_DATA14,
933 GP_1_13_FN, FN_DU1_DB3_C1_DATA13,
934 GP_1_12_FN, FN_DU1_DB2_C0_DATA12,
935 GP_1_11_FN, FN_IP1_16,
936 GP_1_10_FN, FN_IP1_15,
937 GP_1_9_FN, FN_IP1_14,
938 GP_1_8_FN, FN_IP1_13,
939 GP_1_7_FN, FN_IP1_12,
940 GP_1_6_FN, FN_IP1_11,
941 GP_1_5_FN, FN_IP1_10,
942 GP_1_4_FN, FN_IP1_9,
943 GP_1_3_FN, FN_IP1_8,
944 GP_1_2_FN, FN_IP1_7,
945 GP_1_1_FN, FN_IP1_6,
946 GP_1_0_FN, FN_IP1_5, }
947 },
948 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
949 GP_2_31_FN, FN_A15,
950 GP_2_30_FN, FN_A14,
951 GP_2_29_FN, FN_A13,
952 GP_2_28_FN, FN_A12,
953 GP_2_27_FN, FN_A11,
954 GP_2_26_FN, FN_A10,
955 GP_2_25_FN, FN_A9,
956 GP_2_24_FN, FN_A8,
957 GP_2_23_FN, FN_A7,
958 GP_2_22_FN, FN_A6,
959 GP_2_21_FN, FN_A5,
960 GP_2_20_FN, FN_A4,
961 GP_2_19_FN, FN_A3,
962 GP_2_18_FN, FN_A2,
963 GP_2_17_FN, FN_A1,
964 GP_2_16_FN, FN_A0,
965 GP_2_15_FN, FN_D15,
966 GP_2_14_FN, FN_D14,
967 GP_2_13_FN, FN_D13,
968 GP_2_12_FN, FN_D12,
969 GP_2_11_FN, FN_D11,
970 GP_2_10_FN, FN_D10,
971 GP_2_9_FN, FN_D9,
972 GP_2_8_FN, FN_D8,
973 GP_2_7_FN, FN_D7,
974 GP_2_6_FN, FN_D6,
975 GP_2_5_FN, FN_D5,
976 GP_2_4_FN, FN_D4,
977 GP_2_3_FN, FN_D3,
978 GP_2_2_FN, FN_D2,
979 GP_2_1_FN, FN_D1,
980 GP_2_0_FN, FN_D0 }
981 },
982 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
983 0, 0,
984 0, 0,
985 0, 0,
986 0, 0,
987 GP_3_27_FN, FN_CS0,
988 GP_3_26_FN, FN_IP1_22,
989 GP_3_25_FN, FN_IP1_21,
990 GP_3_24_FN, FN_IP1_20,
991 GP_3_23_FN, FN_IP1_19,
992 GP_3_22_FN, FN_IRQ3,
993 GP_3_21_FN, FN_IRQ2,
994 GP_3_20_FN, FN_IRQ1,
995 GP_3_19_FN, FN_IRQ0,
996 GP_3_18_FN, FN_EX_WAIT0,
997 GP_3_17_FN, FN_WE1,
998 GP_3_16_FN, FN_WE0,
999 GP_3_15_FN, FN_RD_WR,
1000 GP_3_14_FN, FN_RD,
1001 GP_3_13_FN, FN_BS,
1002 GP_3_12_FN, FN_EX_CS5,
1003 GP_3_11_FN, FN_EX_CS4,
1004 GP_3_10_FN, FN_EX_CS3,
1005 GP_3_9_FN, FN_EX_CS2,
1006 GP_3_8_FN, FN_EX_CS1,
1007 GP_3_7_FN, FN_EX_CS0,
1008 GP_3_6_FN, FN_CS1_A26,
1009 GP_3_5_FN, FN_IP1_18,
1010 GP_3_4_FN, FN_IP1_17,
1011 GP_3_3_FN, FN_A19,
1012 GP_3_2_FN, FN_A18,
1013 GP_3_1_FN, FN_A17,
1014 GP_3_0_FN, FN_A16 }
1015 },
1016 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
1017 0, 0,
1018 0, 0,
1019 0, 0,
1020 0, 0,
1021 0, 0,
1022 0, 0,
1023 0, 0,
1024 0, 0,
1025 0, 0,
1026 0, 0,
1027 0, 0,
1028 0, 0,
1029 0, 0,
1030 0, 0,
1031 0, 0,
1032 GP_4_16_FN, FN_VI0_FIELD,
1033 GP_4_15_FN, FN_VI0_D11_G3_Y3,
1034 GP_4_14_FN, FN_VI0_D10_G2_Y2,
1035 GP_4_13_FN, FN_VI0_D9_G1_Y1,
1036 GP_4_12_FN, FN_VI0_D8_G0_Y0,
1037 GP_4_11_FN, FN_VI0_D7_B7_C7,
1038 GP_4_10_FN, FN_VI0_D6_B6_C6,
1039 GP_4_9_FN, FN_VI0_D5_B5_C5,
1040 GP_4_8_FN, FN_VI0_D4_B4_C4,
1041 GP_4_7_FN, FN_VI0_D3_B3_C3,
1042 GP_4_6_FN, FN_VI0_D2_B2_C2,
1043 GP_4_5_FN, FN_VI0_D1_B1_C1,
1044 GP_4_4_FN, FN_VI0_D0_B0_C0,
1045 GP_4_3_FN, FN_VI0_VSYNC,
1046 GP_4_2_FN, FN_VI0_HSYNC,
1047 GP_4_1_FN, FN_VI0_CLKENB,
1048 GP_4_0_FN, FN_VI0_CLK }
1049 },
1050 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
1051 0, 0,
1052 0, 0,
1053 0, 0,
1054 0, 0,
1055 0, 0,
1056 0, 0,
1057 0, 0,
1058 0, 0,
1059 0, 0,
1060 0, 0,
1061 0, 0,
1062 0, 0,
1063 0, 0,
1064 0, 0,
1065 0, 0,
1066 GP_5_16_FN, FN_VI1_FIELD,
1067 GP_5_15_FN, FN_VI1_D11_G3_Y3,
1068 GP_5_14_FN, FN_VI1_D10_G2_Y2,
1069 GP_5_13_FN, FN_VI1_D9_G1_Y1,
1070 GP_5_12_FN, FN_VI1_D8_G0_Y0,
1071 GP_5_11_FN, FN_VI1_D7_B7_C7,
1072 GP_5_10_FN, FN_VI1_D6_B6_C6,
1073 GP_5_9_FN, FN_VI1_D5_B5_C5,
1074 GP_5_8_FN, FN_VI1_D4_B4_C4,
1075 GP_5_7_FN, FN_VI1_D3_B3_C3,
1076 GP_5_6_FN, FN_VI1_D2_B2_C2,
1077 GP_5_5_FN, FN_VI1_D1_B1_C1,
1078 GP_5_4_FN, FN_VI1_D0_B0_C0,
1079 GP_5_3_FN, FN_VI1_VSYNC,
1080 GP_5_2_FN, FN_VI1_HSYNC,
1081 GP_5_1_FN, FN_VI1_CLKENB,
1082 GP_5_0_FN, FN_VI1_CLK }
1083 },
1084 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
1085 0, 0,
1086 0, 0,
1087 0, 0,
1088 0, 0,
1089 0, 0,
1090 0, 0,
1091 0, 0,
1092 0, 0,
1093 0, 0,
1094 0, 0,
1095 0, 0,
1096 0, 0,
1097 0, 0,
1098 0, 0,
1099 0, 0,
1100 GP_6_16_FN, FN_IP2_16,
1101 GP_6_15_FN, FN_IP2_15,
1102 GP_6_14_FN, FN_IP2_14,
1103 GP_6_13_FN, FN_IP2_13,
1104 GP_6_12_FN, FN_IP2_12,
1105 GP_6_11_FN, FN_IP2_11,
1106 GP_6_10_FN, FN_IP2_10,
1107 GP_6_9_FN, FN_IP2_9,
1108 GP_6_8_FN, FN_IP2_8,
1109 GP_6_7_FN, FN_IP2_7,
1110 GP_6_6_FN, FN_IP2_6,
1111 GP_6_5_FN, FN_IP2_5,
1112 GP_6_4_FN, FN_IP2_4,
1113 GP_6_3_FN, FN_IP2_3,
1114 GP_6_2_FN, FN_IP2_2,
1115 GP_6_1_FN, FN_IP2_1,
1116 GP_6_0_FN, FN_IP2_0 }
1117 },
1118 { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1) {
1119 0, 0,
1120 0, 0,
1121 0, 0,
1122 0, 0,
1123 0, 0,
1124 0, 0,
1125 0, 0,
1126 0, 0,
1127 0, 0,
1128 0, 0,
1129 0, 0,
1130 0, 0,
1131 0, 0,
1132 0, 0,
1133 0, 0,
1134 GP_7_16_FN, FN_VI3_FIELD,
1135 GP_7_15_FN, FN_IP3_14,
1136 GP_7_14_FN, FN_VI3_D10_Y2,
1137 GP_7_13_FN, FN_IP3_13,
1138 GP_7_12_FN, FN_IP3_12,
1139 GP_7_11_FN, FN_IP3_11,
1140 GP_7_10_FN, FN_IP3_10,
1141 GP_7_9_FN, FN_IP3_9,
1142 GP_7_8_FN, FN_IP3_8,
1143 GP_7_7_FN, FN_IP3_7,
1144 GP_7_6_FN, FN_IP3_6,
1145 GP_7_5_FN, FN_IP3_5,
1146 GP_7_4_FN, FN_IP3_4,
1147 GP_7_3_FN, FN_IP3_3,
1148 GP_7_2_FN, FN_IP3_2,
1149 GP_7_1_FN, FN_IP3_1,
1150 GP_7_0_FN, FN_IP3_0 }
1151 },
1152 { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1) {
1153 0, 0,
1154 0, 0,
1155 0, 0,
1156 0, 0,
1157 0, 0,
1158 0, 0,
1159 0, 0,
1160 0, 0,
1161 0, 0,
1162 0, 0,
1163 0, 0,
1164 0, 0,
1165 0, 0,
1166 0, 0,
1167 0, 0,
1168 GP_8_16_FN, FN_IP4_24,
1169 GP_8_15_FN, FN_IP4_23,
1170 GP_8_14_FN, FN_IP4_22,
1171 GP_8_13_FN, FN_IP4_21,
1172 GP_8_12_FN, FN_IP4_20_19,
1173 GP_8_11_FN, FN_IP4_18_17,
1174 GP_8_10_FN, FN_IP4_16_15,
1175 GP_8_9_FN, FN_IP4_14_13,
1176 GP_8_8_FN, FN_IP4_12_11,
1177 GP_8_7_FN, FN_IP4_10_9,
1178 GP_8_6_FN, FN_IP4_8_7,
1179 GP_8_5_FN, FN_IP4_6_5,
1180 GP_8_4_FN, FN_IP4_4,
1181 GP_8_3_FN, FN_IP4_3_2,
1182 GP_8_2_FN, FN_IP4_1,
1183 GP_8_1_FN, FN_IP4_0,
1184 GP_8_0_FN, FN_VI4_CLK }
1185 },
1186 { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1) {
1187 0, 0,
1188 0, 0,
1189 0, 0,
1190 0, 0,
1191 0, 0,
1192 0, 0,
1193 0, 0,
1194 0, 0,
1195 0, 0,
1196 0, 0,
1197 0, 0,
1198 0, 0,
1199 0, 0,
1200 0, 0,
1201 0, 0,
1202 GP_9_16_FN, FN_VI5_FIELD,
1203 GP_9_15_FN, FN_VI5_D11_Y3,
1204 GP_9_14_FN, FN_VI5_D10_Y2,
1205 GP_9_13_FN, FN_VI5_D9_Y1,
1206 GP_9_12_FN, FN_IP5_11,
1207 GP_9_11_FN, FN_IP5_10,
1208 GP_9_10_FN, FN_IP5_9,
1209 GP_9_9_FN, FN_IP5_8,
1210 GP_9_8_FN, FN_IP5_7,
1211 GP_9_7_FN, FN_IP5_6,
1212 GP_9_6_FN, FN_IP5_5,
1213 GP_9_5_FN, FN_IP5_4,
1214 GP_9_4_FN, FN_IP5_3,
1215 GP_9_3_FN, FN_IP5_2,
1216 GP_9_2_FN, FN_IP5_1,
1217 GP_9_1_FN, FN_IP5_0,
1218 GP_9_0_FN, FN_VI5_CLK }
1219 },
1220 { PINMUX_CFG_REG("GPSR10", 0xE606002C, 32, 1) {
1221 GP_10_31_FN, FN_CAN1_RX,
1222 GP_10_30_FN, FN_CAN1_TX,
1223 GP_10_29_FN, FN_CAN_CLK,
1224 GP_10_28_FN, FN_CAN0_RX,
1225 GP_10_27_FN, FN_CAN0_TX,
1226 GP_10_26_FN, FN_SCIF_CLK,
1227 GP_10_25_FN, FN_IP6_18_17,
1228 GP_10_24_FN, FN_IP6_16,
1229 GP_10_23_FN, FN_IP6_15_14,
1230 GP_10_22_FN, FN_IP6_13_12,
1231 GP_10_21_FN, FN_IP6_11_10,
1232 GP_10_20_FN, FN_IP6_9_8,
1233 GP_10_19_FN, FN_RX1,
1234 GP_10_18_FN, FN_TX1,
1235 GP_10_17_FN, FN_RTS1,
1236 GP_10_16_FN, FN_CTS1,
1237 GP_10_15_FN, FN_SCK1,
1238 GP_10_14_FN, FN_RX0,
1239 GP_10_13_FN, FN_TX0,
1240 GP_10_12_FN, FN_RTS0,
1241 GP_10_11_FN, FN_CTS0,
1242 GP_10_10_FN, FN_SCK0,
1243 GP_10_9_FN, FN_IP6_7,
1244 GP_10_8_FN, FN_IP6_6,
1245 GP_10_7_FN, FN_HCTS1,
1246 GP_10_6_FN, FN_IP6_5,
1247 GP_10_5_FN, FN_IP6_4,
1248 GP_10_4_FN, FN_IP6_3,
1249 GP_10_3_FN, FN_IP6_2,
1250 GP_10_2_FN, FN_HRTS0,
1251 GP_10_1_FN, FN_IP6_1,
1252 GP_10_0_FN, FN_IP6_0 }
1253 },
1254 { PINMUX_CFG_REG("GPSR11", 0xE6060030, 32, 1) {
1255 0, 0,
1256 0, 0,
1257 GP_11_29_FN, FN_AVS2,
1258 GP_11_28_FN, FN_AVS1,
1259 GP_11_27_FN, FN_ADICHS2,
1260 GP_11_26_FN, FN_ADICHS1,
1261 GP_11_25_FN, FN_ADICHS0,
1262 GP_11_24_FN, FN_ADIDATA,
1263 GP_11_23_FN, FN_ADICS_SAMP,
1264 GP_11_22_FN, FN_ADICLK,
1265 GP_11_21_FN, FN_IP7_20,
1266 GP_11_20_FN, FN_IP7_19,
1267 GP_11_19_FN, FN_IP7_18,
1268 GP_11_18_FN, FN_IP7_17,
1269 GP_11_17_FN, FN_IP7_16,
1270 GP_11_16_FN, FN_IP7_15_14,
1271 GP_11_15_FN, FN_IP7_13_12,
1272 GP_11_14_FN, FN_IP7_11_10,
1273 GP_11_13_FN, FN_IP7_9_8,
1274 GP_11_12_FN, FN_SD0_WP,
1275 GP_11_11_FN, FN_SD0_CD,
1276 GP_11_10_FN, FN_SD0_DAT3,
1277 GP_11_9_FN, FN_SD0_DAT2,
1278 GP_11_8_FN, FN_SD0_DAT1,
1279 GP_11_7_FN, FN_SD0_DAT0,
1280 GP_11_6_FN, FN_SD0_CMD,
1281 GP_11_5_FN, FN_SD0_CLK,
1282 GP_11_4_FN, FN_IP7_7,
1283 GP_11_3_FN, FN_IP7_6,
1284 GP_11_2_FN, FN_IP7_5_4,
1285 GP_11_1_FN, FN_IP7_3_2,
1286 GP_11_0_FN, FN_IP7_1_0 }
1287 },
1288 /* IPSR0 */
1289 { PINMUX_CFG_REG("IPSR0", 0xE6060040, 32 ,1) {
1290 /* IP0_31 [1] */
1291 0, 0,
1292 /* IP0_30 [1] */
1293 0, 0,
1294 /* IP0_29 [1] */
1295 0, 0,
1296 /* IP0_28 [1] */
1297 0, 0,
1298 /* IP0_27 [1] */
1299 0, 0,
1300 /* IP0_26 [1] */
1301 0, 0,
1302 /* IP0_25 [1] */
1303 0, 0,
1304 /* IP0_24 [1] */
1305 0, 0,
1306 /* IP0_23 [1] */
1307 FN_DU0_DB7_C5, 0,
1308 /* IP0_22 [1] */
1309 FN_DU0_DB6_C4, 0,
1310 /* IP0_21 [1] */
1311 FN_DU0_DB5_C3, 0,
1312 /* IP0_20 [1] */
1313 FN_DU0_DB4_C2, 0,
1314 /* IP0_19 [1] */
1315 FN_DU0_DB3_C1, 0,
1316 /* IP0_18 [1] */
1317 FN_DU0_DB2_C0, 0,
1318 /* IP0_17 [1] */
1319 FN_DU0_DB1, 0,
1320 /* IP0_16 [1] */
1321 FN_DU0_DB0, 0,
1322 /* IP0_15 [1] */
1323 FN_DU0_DG7_Y3_DATA15, 0,
1324 /* IP0_14 [1] */
1325 FN_DU0_DG6_Y2_DATA14, 0,
1326 /* IP0_13 [1] */
1327 FN_DU0_DG5_Y1_DATA13, 0,
1328 /* IP0_12 [1] */
1329 FN_DU0_DG4_Y0_DATA12, 0,
1330 /* IP0_11 [1] */
1331 FN_DU0_DG3_C7_DATA11, 0,
1332 /* IP0_10 [1] */
1333 FN_DU0_DG2_C6_DATA10, 0,
1334 /* IP0_9 [1] */
1335 FN_DU0_DG1_DATA9, 0,
1336 /* IP0_8 [1] */
1337 FN_DU0_DG0_DATA8, 0,
1338 /* IP0_7 [1] */
1339 FN_DU0_DR7_Y9_DATA7, 0,
1340 /* IP0_6 [1] */
1341 FN_DU0_DR6_Y8_DATA6, 0,
1342 /* IP0_5 [1] */
1343 FN_DU0_DR5_Y7_DATA5, 0,
1344 /* IP0_4 [1] */
1345 FN_DU0_DR4_Y6_DATA4, 0,
1346 /* IP0_3 [1] */
1347 FN_DU0_DR3_Y5_DATA3, 0,
1348 /* IP0_2 [1] */
1349 FN_DU0_DR2_Y4_DATA2, 0,
1350 /* IP0_1 [1] */
1351 FN_DU0_DR1_DATA1, 0,
1352 /* IP0_0 [1] */
1353 FN_DU0_DR0_DATA0, 0, }
1354 },
1355 /* IPSR1 */
1356 { PINMUX_CFG_REG("IPSR1", 0xE6060044, 32, 1) {
1357 /* IP1_31 [1] */
1358 0, 0,
1359 /* IP1_30 [1] */
1360 0, 0,
1361 /* IP1_29 [1] */
1362 0, 0,
1363 /* IP1_28 [1] */
1364 0, 0,
1365 /* IP1_27 [1] */
1366 0, 0,
1367 /* IP1_26 [1] */
1368 0, 0,
1369 /* IP1_25 [1] */
1370 0, 0,
1371 /* IP1_24 [1] */
1372 0, 0,
1373 /* IP1_23 [1] */
1374 0, 0,
1375 /* IP1_22 [1] */
1376 FN_A25, FN_SSL,
1377 /* IP1_21 [1] */
1378 FN_A24, FN_SPCLK,
1379 /* IP1_20 [1] */
1380 FN_A23, FN_IO3,
1381 /* IP1_19 [1] */
1382 FN_A22, FN_IO2,
1383 /* IP1_18 [1] */
1384 FN_A21, FN_MISO_IO1,
1385 /* IP1_17 [1] */
1386 FN_A20, FN_MOSI_IO0,
1387 /* IP1_16 [1] */
1388 FN_DU1_DG7_Y3_DATA11, 0,
1389 /* IP1_15 [1] */
1390 FN_DU1_DG6_Y2_DATA10, 0,
1391 /* IP1_14 [1] */
1392 FN_DU1_DG5_Y1_DATA9, 0,
1393 /* IP1_13 [1] */
1394 FN_DU1_DG4_Y0_DATA8, 0,
1395 /* IP1_12 [1] */
1396 FN_DU1_DG3_C7_DATA7, 0,
1397 /* IP1_11 [1] */
1398 FN_DU1_DG2_C6_DATA6, 0,
1399 /* IP1_10 [1] */
1400 FN_DU1_DR7_DATA5, 0,
1401 /* IP1_9 [1] */
1402 FN_DU1_DR6_DATA4, 0,
1403 /* IP1_8 [1] */
1404 FN_DU1_DR5_Y7_DATA3, 0,
1405 /* IP1_7 [1] */
1406 FN_DU1_DR4_Y6_DATA2, 0,
1407 /* IP1_6 [1] */
1408 FN_DU1_DR3_Y5_DATA1, 0,
1409 /* IP1_5 [1] */
1410 FN_DU1_DR2_Y4_DATA0, 0,
1411 /* IP1_4 [1] */
1412 FN_DU0_CDE, 0,
1413 /* IP1_3 [1] */
1414 FN_DU0_DISP, 0,
1415 /* IP1_2 [1] */
1416 FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, 0,
1417 /* IP1_1 [1] */
1418 FN_DU0_EXVSYNC_DU0_VSYNC, 0,
1419 /* IP1_0 [1] */
1420 FN_DU0_EXHSYNC_DU0_HSYNC, 0, }
1421 },
1422 /* IPSR2 */
1423 { PINMUX_CFG_REG("IPSR2", 0xE6060048, 32, 1) {
1424 /* IP2_31 [1] */
1425 0, 0,
1426 /* IP2_30 [1] */
1427 0, 0,
1428 /* IP2_29 [1] */
1429 0, 0,
1430 /* IP2_28 [1] */
1431 0, 0,
1432 /* IP2_27 [1] */
1433 0, 0,
1434 /* IP2_26 [1] */
1435 0, 0,
1436 /* IP2_25 [1] */
1437 0, 0,
1438 /* IP2_24 [1] */
1439 0, 0,
1440 /* IP2_23 [1] */
1441 0, 0,
1442 /* IP2_22 [1] */
1443 0, 0,
1444 /* IP2_21 [1] */
1445 0, 0,
1446 /* IP2_20 [1] */
1447 0, 0,
1448 /* IP2_19 [1] */
1449 0, 0,
1450 /* IP2_18 [1] */
1451 0, 0,
1452 /* IP2_17 [1] */
1453 0, 0,
1454 /* IP2_16 [1] */
1455 FN_VI2_FIELD, FN_AVB_TXD2,
1456 /* IP2_15 [1] */
1457 FN_VI2_D11_Y3, FN_AVB_TXD1,
1458 /* IP2_14 [1] */
1459 FN_VI2_D10_Y2, FN_AVB_TXD0,
1460 /* IP2_13 [1] */
1461 FN_VI2_D9_Y1, FN_AVB_TX_EN,
1462 /* IP2_12 [1] */
1463 FN_VI2_D8_Y0, FN_AVB_TXD3,
1464 /* IP2_11 [1] */
1465 FN_VI2_D7_C7, FN_AVB_COL,
1466 /* IP2_10 [1] */
1467 FN_VI2_D6_C6, FN_AVB_RX_ER,
1468 /* IP2_9 [1] */
1469 FN_VI2_D5_C5, FN_AVB_RXD7,
1470 /* IP2_8 [1] */
1471 FN_VI2_D4_C4, FN_AVB_RXD6,
1472 /* IP2_7 [1] */
1473 FN_VI2_D3_C3, FN_AVB_RXD5,
1474 /* IP2_6 [1] */
1475 FN_VI2_D2_C2, FN_AVB_RXD4,
1476 /* IP2_5 [1] */
1477 FN_VI2_D1_C1, FN_AVB_RXD3,
1478 /* IP2_4 [1] */
1479 FN_VI2_D0_C0, FN_AVB_RXD2,
1480 /* IP2_3 [1] */
1481 FN_VI2_VSYNC, FN_AVB_RXD1,
1482 /* IP2_2 [1] */
1483 FN_VI2_HSYNC, FN_AVB_RXD0,
1484 /* IP2_1 [1] */
1485 FN_VI2_CLKENB, FN_AVB_RX_DV,
1486 /* IP2_0 [1] */
1487 FN_VI2_CLK, FN_AVB_RX_CLK, }
1488 },
1489 /* IPSR3 */
1490 { PINMUX_CFG_REG("IPSR3", 0xE606004C, 32, 1) {
1491 /* IP3_31 [1] */
1492 0, 0,
1493 /* IP3_30 [1] */
1494 0, 0,
1495 /* IP3_29 [1] */
1496 0, 0,
1497 /* IP3_28 [1] */
1498 0, 0,
1499 /* IP3_27 [1] */
1500 0, 0,
1501 /* IP3_26 [1] */
1502 0, 0,
1503 /* IP3_25 [1] */
1504 0, 0,
1505 /* IP3_24 [1] */
1506 0, 0,
1507 /* IP3_23 [1] */
1508 0, 0,
1509 /* IP3_22 [1] */
1510 0, 0,
1511 /* IP3_21 [1] */
1512 0, 0,
1513 /* IP3_20 [1] */
1514 0, 0,
1515 /* IP3_19 [1] */
1516 0, 0,
1517 /* IP3_18 [1] */
1518 0, 0,
1519 /* IP3_17 [1] */
1520 0, 0,
1521 /* IP3_16 [1] */
1522 0, 0,
1523 /* IP3_15 [1] */
1524 0, 0,
1525 /* IP3_14 [1] */
1526 FN_VI3_D11_Y3, 0,
1527 /* IP3_13 [1] */
1528 FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
1529 /* IP3_12 [1] */
1530 FN_VI3_D8_Y0, FN_AVB_CRS,
1531 /* IP3_11 [1] */
1532 FN_VI3_D7_C7, FN_AVB_PHY_INT,
1533 /* IP3_10 [1] */
1534 FN_VI3_D6_C6, FN_AVB_MAGIC,
1535 /* IP3_9 [1] */
1536 FN_VI3_D5_C5, FN_AVB_LINK,
1537 /* IP3_8 [1] */
1538 FN_VI3_D4_C4, FN_AVB_MDIO,
1539 /* IP3_7 [1] */
1540 FN_VI3_D3_C3, FN_AVB_MDC,
1541 /* IP3_6 [1] */
1542 FN_VI3_D2_C2, FN_AVB_GTX_CLK,
1543 /* IP3_5 [1] */
1544 FN_VI3_D1_C1, FN_AVB_TX_ER,
1545 /* IP3_4 [1] */
1546 FN_VI3_D0_C0, FN_AVB_TXD7,
1547 /* IP3_3 [1] */
1548 FN_VI3_VSYNC, FN_AVB_TXD6,
1549 /* IP3_2 [1] */
1550 FN_VI3_HSYNC, FN_AVB_TXD5,
1551 /* IP3_1 [1] */
1552 FN_VI3_CLKENB, FN_AVB_TXD4,
1553 /* IP3_0 [1] */
1554 FN_VI3_CLK, FN_AVB_TX_CLK,}
1555 },
1556 /* IPSR4 */
1557 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060050, 32,
1558 1, 1, 1, 1, 1, 1, 1,
1559 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 1, 1) {
1560 /* IP4_31 [1] */
1561 0, 0,
1562 /* IP4_30 [1] */
1563 0, 0,
1564 /* IP4_29 [1] */
1565 0, 0,
1566 /* IP4_28 [1] */
1567 0, 0,
1568 /* IP4_27 [1] */
1569 0, 0,
1570 /* IP4_26 [1] */
1571 0, 0,
1572 /* IP4_25 [1] */
1573 0, 0,
1574 /* IP4_24 [1] */
1575 FN_VI4_FIELD, FN_VI3_D15_Y7,
1576 /* IP4_23 [1] */
1577 FN_VI4_D11_Y3, FN_VI3_D14_Y6,
1578 /* IP4_22 [1] */
1579 FN_VI4_D10_Y2, FN_VI3_D13_Y5,
1580 /* IP4_21 [1] */
1581 FN_VI4_D9_Y1, FN_VI3_D12_Y4,
1582 /* IP4_20_19 [2] */
1583 FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7, 0,
1584 /* IP4_18_17 [2] */
1585 FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, 0,
1586 /* IP4_16_15 [2] */
1587 FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5, 0,
1588 /* IP4_14_13 [2] */
1589 FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, 0,
1590 /* IP4_12_11 [2] */
1591 FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0, 0,
1592 /* IP4_10_9 [2] */
1593 FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, 0,
1594 /* IP4_8_7 [2] */
1595 FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0, 0,
1596 /* IP4_6_5 [2] */
1597 FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, 0,
1598 /* IP4_4 [1] */
1599 FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
1600 /* IP4_3_2 [2] */
1601 FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, 0, 0,
1602 /* IP4_1 [1] */
1603 FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,
1604 /* IP4_0 [1] */
1605 FN_VI4_CLKENB, FN_VI0_D12_G4_Y4,}
1606 },
1607 /* IPSR5 */
1608 { PINMUX_CFG_REG("IPSR5", 0xE6060054, 32, 1) {
1609 /* IP5_31 [1] */
1610 0, 0,
1611 /* IP5_30 [1] */
1612 0, 0,
1613 /* IP5_29 [1] */
1614 0, 0,
1615 /* IP5_28 [1] */
1616 0, 0,
1617 /* IP5_27 [1] */
1618 0, 0,
1619 /* IP5_26 [1] */
1620 0, 0,
1621 /* IP5_25 [1] */
1622 0, 0,
1623 /* IP5_24 [1] */
1624 0, 0,
1625 /* IP5_23 [1] */
1626 0, 0,
1627 /* IP5_22 [1] */
1628 0, 0,
1629 /* IP5_21 [1] */
1630 0, 0,
1631 /* IP5_20 [1] */
1632 0, 0,
1633 /* IP5_19 [1] */
1634 0, 0,
1635 /* IP5_18 [1] */
1636 0, 0,
1637 /* IP5_17 [1] */
1638 0, 0,
1639 /* IP5_16 [1] */
1640 0, 0,
1641 /* IP5_15 [1] */
1642 0, 0,
1643 /* IP5_14 [1] */
1644 0, 0,
1645 /* IP5_13 [1] */
1646 0, 0,
1647 /* IP5_12 [1] */
1648 0, 0,
1649 /* IP5_11 [1] */
1650 FN_VI5_D8_Y0, FN_VI1_D23_R7,
1651 /* IP5_10 [1] */
1652 FN_VI5_D7_C7, FN_VI1_D22_R6,
1653 /* IP5_9 [1] */
1654 FN_VI5_D6_C6, FN_VI1_D21_R5,
1655 /* IP5_8 [1] */
1656 FN_VI5_D5_C5, FN_VI1_D20_R4,
1657 /* IP5_7 [1] */
1658 FN_VI5_D4_C4, FN_VI1_D19_R3,
1659 /* IP5_6 [1] */
1660 FN_VI5_D3_C3, FN_VI1_D18_R2,
1661 /* IP5_5 [1] */
1662 FN_VI5_D2_C2, FN_VI1_D17_R1,
1663 /* IP5_4 [1] */
1664 FN_VI5_D1_C1, FN_VI1_D16_R0,
1665 /* IP5_3 [1] */
1666 FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,
1667 /* IP5_2 [1] */
1668 FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1,
1669 /* IP5_1 [1] */
1670 FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,
1671 /* IP5_0 [1] */
1672 FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1,}
1673 },
1674 /* IPSR6 */
1675 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060058, 32,
1676 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1677 2, 1, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1) {
1678 /* IP6_31 [1] */
1679 0, 0,
1680 /* IP6_30 [1] */
1681 0, 0,
1682 /* IP6_29 [1] */
1683 0, 0,
1684 /* IP6_28 [1] */
1685 0, 0,
1686 /* IP6_27 [1] */
1687 0, 0,
1688 /* IP6_26 [1] */
1689 0, 0,
1690 /* IP6_25 [1] */
1691 0, 0,
1692 /* IP6_24 [1] */
1693 0, 0,
1694 /* IP6_23 [1] */
1695 0, 0,
1696 /* IP6_22 [1] */
1697 0, 0,
1698 /* IP6_21 [1] */
1699 0, 0,
1700 /* IP6_20 [1] */
1701 0, 0,
1702 /* IP6_19 [1] */
1703 0, 0,
1704 /* IP6_18_17 [2] */
1705 FN_DREQ1, FN_RX3, 0, 0,
1706 /* IP6_16 [1] */
1707 FN_TX3, 0,
1708 /* IP6_15_14 [2] */
1709 FN_DACK1, FN_SCK3, 0, 0,
1710 /* IP6_13_12 [2] */
1711 FN_DREQ0, FN_RX2, 0, 0,
1712 /* IP6_11_10 [2] */
1713 FN_DACK0, FN_TX2, 0, 0,
1714 /* IP6_9_8 [2] */
1715 FN_DRACK0, FN_SCK2, 0, 0,
1716 /* IP6_7 [1] */
1717 FN_MSIOF1_RXD, FN_HRX1,
1718 /* IP6_6 [1] */
1719 FN_MSIOF1_TXD, FN_HTX1,
1720 /* IP6_5 [1] */
1721 FN_MSIOF1_SYNC, FN_HRTS1,
1722 /* IP6_4 [1] */
1723 FN_MSIOF1_SCK, FN_HSCK1,
1724 /* IP6_3 [1] */
1725 FN_MSIOF0_RXD, FN_HRX0,
1726 /* IP6_2 [1] */
1727 FN_MSIOF0_TXD, FN_HTX0,
1728 /* IP6_1 [1] */
1729 FN_MSIOF0_SYNC, FN_HCTS0,
1730 /* IP6_0 [1] */
1731 FN_MSIOF0_SCK, FN_HSCK0, }
1732 },
1733 /* IPSR7 */
1734 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606005C, 32,
1735 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1736 1, 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 2, 2, 2) {
1737 /* IP7_31 [1] */
1738 0, 0,
1739 /* IP7_30 [1] */
1740 0, 0,
1741 /* IP7_29 [1] */
1742 0, 0,
1743 /* IP7_28 [1] */
1744 0, 0,
1745 /* IP7_27 [1] */
1746 0, 0,
1747 /* IP7_26 [1] */
1748 0, 0,
1749 /* IP7_25 [1] */
1750 0, 0,
1751 /* IP7_24 [1] */
1752 0, 0,
1753 /* IP7_23 [1] */
1754 0, 0,
1755 /* IP7_22 [1] */
1756 0, 0,
1757 /* IP7_21 [1] */
1758 0, 0,
1759 /* IP7_20 [1] */
1760 FN_AUDIO_CLKB, 0,
1761 /* IP7_19 [1] */
1762 FN_AUDIO_CLKA, 0,
1763 /* IP7_18 [1] */
1764 FN_AUDIO_CLKOUT, 0,
1765 /* IP7_17 [1] */
1766 FN_SSI_SDATA4, 0,
1767 /* IP7_16 [1] */
1768 FN_SSI_WS4, 0,
1769 /* IP7_15_14 [2] */
1770 FN_SSI_SCK4, FN_TPU0TO3, 0, 0,
1771 /* IP7_13_12 [2] */
1772 FN_SSI_SDATA3, FN_TPU0TO2, 0, 0,
1773 /* IP7_11_10 [2] */
1774 FN_SSI_WS3, FN_TPU0TO1, 0, 0,
1775 /* IP7_9_8 [2] */
1776 FN_SSI_SCK3, FN_TPU0TO0, 0, 0,
1777 /* IP7_7 [1] */
1778 FN_PWM4, 0,
1779 /* IP7_6 [1] */
1780 FN_PWM3, 0,
1781 /* IP7_5_4 [2] */
1782 FN_PWM2, FN_TCLK3, FN_FSO_TOE, 0,
1783 /* IP7_3_2 [2] */
1784 FN_PWM1, FN_TCLK2, FN_FSO_CFE_1, 0,
1785 /* IP7_1_0 [2] */
1786 FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, 0, }
1787 },
1788 /* MOD SEL */
1789 { PINMUX_CFG_REG("MOD_SEL", 0xE6060140, 32, 1) {
1790 0, 0,
1791 0, 0,
1792 0, 0,
1793 0, 0,
1794 0, 0,
1795 0, 0,
1796 0, 0,
1797 0, 0,
1798 0, 0,
1799 0, 0,
1800 0, 0,
1801 0, 0,
1802 0, 0,
1803 0, 0,
1804 0, 0,
1805 0, 0,
1806 0, 0,
1807 0, 0,
1808 0, 0,
1809 0, 0,
1810 0, 0,
1811 0, 0,
1812 0, 0,
1813 0, 0,
1814 0, 0,
1815 0, 0,
1816 0, 0,
1817 0, 0,
1818 0, 0,
1819 0, 0,
1820 0, 0,
1821 /* MOD_SEL [1] */
1822 FN_SEL_VI1_0, FN_SEL_VI1_1, }
1823 },
1824 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
1825 0, 0,
1826 0, 0,
1827 0, 0,
1828 GP_0_28_IN, GP_0_28_OUT,
1829 GP_0_27_IN, GP_0_27_OUT,
1830 GP_0_26_IN, GP_0_26_OUT,
1831 GP_0_25_IN, GP_0_25_OUT,
1832 GP_0_24_IN, GP_0_24_OUT,
1833 GP_0_23_IN, GP_0_23_OUT,
1834 GP_0_22_IN, GP_0_22_OUT,
1835 GP_0_21_IN, GP_0_21_OUT,
1836 GP_0_20_IN, GP_0_20_OUT,
1837 GP_0_19_IN, GP_0_19_OUT,
1838 GP_0_18_IN, GP_0_18_OUT,
1839 GP_0_17_IN, GP_0_17_OUT,
1840 GP_0_16_IN, GP_0_16_OUT,
1841 GP_0_15_IN, GP_0_15_OUT,
1842 GP_0_14_IN, GP_0_14_OUT,
1843 GP_0_13_IN, GP_0_13_OUT,
1844 GP_0_12_IN, GP_0_12_OUT,
1845 GP_0_11_IN, GP_0_11_OUT,
1846 GP_0_10_IN, GP_0_10_OUT,
1847 GP_0_9_IN, GP_0_9_OUT,
1848 GP_0_8_IN, GP_0_8_OUT,
1849 GP_0_7_IN, GP_0_7_OUT,
1850 GP_0_6_IN, GP_0_6_OUT,
1851 GP_0_5_IN, GP_0_5_OUT,
1852 GP_0_4_IN, GP_0_4_OUT,
1853 GP_0_3_IN, GP_0_3_OUT,
1854 GP_0_2_IN, GP_0_2_OUT,
1855 GP_0_1_IN, GP_0_1_OUT,
1856 GP_0_0_IN, GP_0_0_OUT, }
1857 },
1858 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
1859 0, 0,
1860 0, 0,
1861 0, 0,
1862 0, 0,
1863 0, 0,
1864 0, 0,
1865 0, 0,
1866 0, 0,
1867 0, 0,
1868 GP_1_22_IN, GP_1_22_OUT,
1869 GP_1_21_IN, GP_1_21_OUT,
1870 GP_1_20_IN, GP_1_20_OUT,
1871 GP_1_19_IN, GP_1_19_OUT,
1872 GP_1_18_IN, GP_1_18_OUT,
1873 GP_1_17_IN, GP_1_17_OUT,
1874 GP_1_16_IN, GP_1_16_OUT,
1875 GP_1_15_IN, GP_1_15_OUT,
1876 GP_1_14_IN, GP_1_14_OUT,
1877 GP_1_13_IN, GP_1_13_OUT,
1878 GP_1_12_IN, GP_1_12_OUT,
1879 GP_1_11_IN, GP_1_11_OUT,
1880 GP_1_10_IN, GP_1_10_OUT,
1881 GP_1_9_IN, GP_1_9_OUT,
1882 GP_1_8_IN, GP_1_8_OUT,
1883 GP_1_7_IN, GP_1_7_OUT,
1884 GP_1_6_IN, GP_1_6_OUT,
1885 GP_1_5_IN, GP_1_5_OUT,
1886 GP_1_4_IN, GP_1_4_OUT,
1887 GP_1_3_IN, GP_1_3_OUT,
1888 GP_1_2_IN, GP_1_2_OUT,
1889 GP_1_1_IN, GP_1_1_OUT,
1890 GP_1_0_IN, GP_1_0_OUT, }
1891 },
1892 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } },
1893 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
1894 0, 0,
1895 0, 0,
1896 0, 0,
1897 0, 0,
1898 GP_3_27_IN, GP_3_27_OUT,
1899 GP_3_26_IN, GP_3_26_OUT,
1900 GP_3_25_IN, GP_3_25_OUT,
1901 GP_3_24_IN, GP_3_24_OUT,
1902 GP_3_23_IN, GP_3_23_OUT,
1903 GP_3_22_IN, GP_3_22_OUT,
1904 GP_3_21_IN, GP_3_21_OUT,
1905 GP_3_20_IN, GP_3_20_OUT,
1906 GP_3_19_IN, GP_3_19_OUT,
1907 GP_3_18_IN, GP_3_18_OUT,
1908 GP_3_17_IN, GP_3_17_OUT,
1909 GP_3_16_IN, GP_3_16_OUT,
1910 GP_3_15_IN, GP_3_15_OUT,
1911 GP_3_14_IN, GP_3_14_OUT,
1912 GP_3_13_IN, GP_3_13_OUT,
1913 GP_3_12_IN, GP_3_12_OUT,
1914 GP_3_11_IN, GP_3_11_OUT,
1915 GP_3_10_IN, GP_3_10_OUT,
1916 GP_3_9_IN, GP_3_9_OUT,
1917 GP_3_8_IN, GP_3_8_OUT,
1918 GP_3_7_IN, GP_3_7_OUT,
1919 GP_3_6_IN, GP_3_6_OUT,
1920 GP_3_5_IN, GP_3_5_OUT,
1921 GP_3_4_IN, GP_3_4_OUT,
1922 GP_3_3_IN, GP_3_3_OUT,
1923 GP_3_2_IN, GP_3_2_OUT,
1924 GP_3_1_IN, GP_3_1_OUT,
1925 GP_3_0_IN, GP_3_0_OUT, }
1926 },
1927 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
1928 0, 0,
1929 0, 0,
1930 0, 0,
1931 0, 0,
1932 0, 0,
1933 0, 0,
1934 0, 0,
1935 0, 0,
1936 0, 0,
1937 0, 0,
1938 0, 0,
1939 0, 0,
1940 0, 0,
1941 0, 0,
1942 0, 0,
1943 GP_4_16_IN, GP_4_16_OUT,
1944 GP_4_15_IN, GP_4_15_OUT,
1945 GP_4_14_IN, GP_4_14_OUT,
1946 GP_4_13_IN, GP_4_13_OUT,
1947 GP_4_12_IN, GP_4_12_OUT,
1948 GP_4_11_IN, GP_4_11_OUT,
1949 GP_4_10_IN, GP_4_10_OUT,
1950 GP_4_9_IN, GP_4_9_OUT,
1951 GP_4_8_IN, GP_4_8_OUT,
1952 GP_4_7_IN, GP_4_7_OUT,
1953 GP_4_6_IN, GP_4_6_OUT,
1954 GP_4_5_IN, GP_4_5_OUT,
1955 GP_4_4_IN, GP_4_4_OUT,
1956 GP_4_3_IN, GP_4_3_OUT,
1957 GP_4_2_IN, GP_4_2_OUT,
1958 GP_4_1_IN, GP_4_1_OUT,
1959 GP_4_0_IN, GP_4_0_OUT, }
1960 },
1961 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
1962 0, 0,
1963 0, 0,
1964 0, 0,
1965 0, 0,
1966 0, 0,
1967 0, 0,
1968 0, 0,
1969 0, 0,
1970 0, 0,
1971 0, 0,
1972 0, 0,
1973 0, 0,
1974 0, 0,
1975 0, 0,
1976 0, 0,
1977 GP_5_16_IN, GP_5_16_OUT,
1978 GP_5_15_IN, GP_5_15_OUT,
1979 GP_5_14_IN, GP_5_14_OUT,
1980 GP_5_13_IN, GP_5_13_OUT,
1981 GP_5_12_IN, GP_5_12_OUT,
1982 GP_5_11_IN, GP_5_11_OUT,
1983 GP_5_10_IN, GP_5_10_OUT,
1984 GP_5_9_IN, GP_5_9_OUT,
1985 GP_5_8_IN, GP_5_8_OUT,
1986 GP_5_7_IN, GP_5_7_OUT,
1987 GP_5_6_IN, GP_5_6_OUT,
1988 GP_5_5_IN, GP_5_5_OUT,
1989 GP_5_4_IN, GP_5_4_OUT,
1990 GP_5_3_IN, GP_5_3_OUT,
1991 GP_5_2_IN, GP_5_2_OUT,
1992 GP_5_1_IN, GP_5_1_OUT,
1993 GP_5_0_IN, GP_5_0_OUT, }
1994 },
1995 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055104, 32, 1) {
1996 0, 0,
1997 0, 0,
1998 0, 0,
1999 0, 0,
2000 0, 0,
2001 0, 0,
2002 0, 0,
2003 0, 0,
2004 0, 0,
2005 0, 0,
2006 0, 0,
2007 0, 0,
2008 0, 0,
2009 0, 0,
2010 0, 0,
2011 GP_6_16_IN, GP_6_16_OUT,
2012 GP_6_15_IN, GP_6_15_OUT,
2013 GP_6_14_IN, GP_6_14_OUT,
2014 GP_6_13_IN, GP_6_13_OUT,
2015 GP_6_12_IN, GP_6_12_OUT,
2016 GP_6_11_IN, GP_6_11_OUT,
2017 GP_6_10_IN, GP_6_10_OUT,
2018 GP_6_9_IN, GP_6_9_OUT,
2019 GP_6_8_IN, GP_6_8_OUT,
2020 GP_6_7_IN, GP_6_7_OUT,
2021 GP_6_6_IN, GP_6_6_OUT,
2022 GP_6_5_IN, GP_6_5_OUT,
2023 GP_6_4_IN, GP_6_4_OUT,
2024 GP_6_3_IN, GP_6_3_OUT,
2025 GP_6_2_IN, GP_6_2_OUT,
2026 GP_6_1_IN, GP_6_1_OUT,
2027 GP_6_0_IN, GP_6_0_OUT, }
2028 },
2029 { PINMUX_CFG_REG("INOUTSEL7", 0xE6055204, 32, 1) {
2030 0, 0,
2031 0, 0,
2032 0, 0,
2033 0, 0,
2034 0, 0,
2035 0, 0,
2036 0, 0,
2037 0, 0,
2038 0, 0,
2039 0, 0,
2040 0, 0,
2041 0, 0,
2042 0, 0,
2043 0, 0,
2044 0, 0,
2045 GP_7_16_IN, GP_7_16_OUT,
2046 GP_7_15_IN, GP_7_15_OUT,
2047 GP_7_14_IN, GP_7_14_OUT,
2048 GP_7_13_IN, GP_7_13_OUT,
2049 GP_7_12_IN, GP_7_12_OUT,
2050 GP_7_11_IN, GP_7_11_OUT,
2051 GP_7_10_IN, GP_7_10_OUT,
2052 GP_7_9_IN, GP_7_9_OUT,
2053 GP_7_8_IN, GP_7_8_OUT,
2054 GP_7_7_IN, GP_7_7_OUT,
2055 GP_7_6_IN, GP_7_6_OUT,
2056 GP_7_5_IN, GP_7_5_OUT,
2057 GP_7_4_IN, GP_7_4_OUT,
2058 GP_7_3_IN, GP_7_3_OUT,
2059 GP_7_2_IN, GP_7_2_OUT,
2060 GP_7_1_IN, GP_7_1_OUT,
2061 GP_7_0_IN, GP_7_0_OUT, }
2062 },
2063 { PINMUX_CFG_REG("INOUTSEL8", 0xE6055304, 32, 1) {
2064 0, 0,
2065 0, 0,
2066 0, 0,
2067 0, 0,
2068 0, 0,
2069 0, 0,
2070 0, 0,
2071 0, 0,
2072 0, 0,
2073 0, 0,
2074 0, 0,
2075 0, 0,
2076 0, 0,
2077 0, 0,
2078 0, 0,
2079 GP_8_16_IN, GP_8_16_OUT,
2080 GP_8_15_IN, GP_8_15_OUT,
2081 GP_8_14_IN, GP_8_14_OUT,
2082 GP_8_13_IN, GP_8_13_OUT,
2083 GP_8_12_IN, GP_8_12_OUT,
2084 GP_8_11_IN, GP_8_11_OUT,
2085 GP_8_10_IN, GP_8_10_OUT,
2086 GP_8_9_IN, GP_8_9_OUT,
2087 GP_8_8_IN, GP_8_8_OUT,
2088 GP_8_7_IN, GP_8_7_OUT,
2089 GP_8_6_IN, GP_8_6_OUT,
2090 GP_8_5_IN, GP_8_5_OUT,
2091 GP_8_4_IN, GP_8_4_OUT,
2092 GP_8_3_IN, GP_8_3_OUT,
2093 GP_8_2_IN, GP_8_2_OUT,
2094 GP_8_1_IN, GP_8_1_OUT,
2095 GP_8_0_IN, GP_8_0_OUT, }
2096 },
2097 { PINMUX_CFG_REG("INOUTSEL9", 0xE6055404, 32, 1) {
2098 0, 0,
2099 0, 0,
2100 0, 0,
2101 0, 0,
2102 0, 0,
2103 0, 0,
2104 0, 0,
2105 0, 0,
2106 0, 0,
2107 0, 0,
2108 0, 0,
2109 0, 0,
2110 0, 0,
2111 0, 0,
2112 0, 0,
2113 GP_9_16_IN, GP_9_16_OUT,
2114 GP_9_15_IN, GP_9_15_OUT,
2115 GP_9_14_IN, GP_9_14_OUT,
2116 GP_9_13_IN, GP_9_13_OUT,
2117 GP_9_12_IN, GP_9_12_OUT,
2118 GP_9_11_IN, GP_9_11_OUT,
2119 GP_9_10_IN, GP_9_10_OUT,
2120 GP_9_9_IN, GP_9_9_OUT,
2121 GP_9_8_IN, GP_9_8_OUT,
2122 GP_9_7_IN, GP_9_7_OUT,
2123 GP_9_6_IN, GP_9_6_OUT,
2124 GP_9_5_IN, GP_9_5_OUT,
2125 GP_9_4_IN, GP_9_4_OUT,
2126 GP_9_3_IN, GP_9_3_OUT,
2127 GP_9_2_IN, GP_9_2_OUT,
2128 GP_9_1_IN, GP_9_1_OUT,
2129 GP_9_0_IN, GP_9_0_OUT, }
2130 },
2131 { PINMUX_CFG_REG("INOUTSEL10", 0xE6055504, 32, 1) { GP_INOUTSEL(10) } },
2132 { PINMUX_CFG_REG("INOUTSEL11", 0xE6055604, 32, 1) {
2133 0, 0,
2134 0, 0,
2135 GP_11_29_IN, GP_11_29_OUT,
2136 GP_11_28_IN, GP_11_28_OUT,
2137 GP_11_27_IN, GP_11_27_OUT,
2138 GP_11_26_IN, GP_11_26_OUT,
2139 GP_11_25_IN, GP_11_25_OUT,
2140 GP_11_24_IN, GP_11_24_OUT,
2141 GP_11_23_IN, GP_11_23_OUT,
2142 GP_11_22_IN, GP_11_22_OUT,
2143 GP_11_21_IN, GP_11_21_OUT,
2144 GP_11_20_IN, GP_11_20_OUT,
2145 GP_11_19_IN, GP_11_19_OUT,
2146 GP_11_18_IN, GP_11_18_OUT,
2147 GP_11_17_IN, GP_11_17_OUT,
2148 GP_11_16_IN, GP_11_16_OUT,
2149 GP_11_15_IN, GP_11_15_OUT,
2150 GP_11_14_IN, GP_11_14_OUT,
2151 GP_11_13_IN, GP_11_13_OUT,
2152 GP_11_12_IN, GP_11_12_OUT,
2153 GP_11_11_IN, GP_11_11_OUT,
2154 GP_11_10_IN, GP_11_10_OUT,
2155 GP_11_9_IN, GP_11_9_OUT,
2156 GP_11_8_IN, GP_11_8_OUT,
2157 GP_11_7_IN, GP_11_7_OUT,
2158 GP_11_6_IN, GP_11_6_OUT,
2159 GP_11_5_IN, GP_11_5_OUT,
2160 GP_11_4_IN, GP_11_4_OUT,
2161 GP_11_3_IN, GP_11_3_OUT,
2162 GP_11_2_IN, GP_11_2_OUT,
2163 GP_11_1_IN, GP_11_1_OUT,
2164 GP_11_0_IN, GP_11_0_OUT, }
2165 },
2166 { },
2167 };
2168
2169 static struct pinmux_data_reg pinmux_data_regs[] = {
2170 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
2171 0, 0, 0, GP_0_28_DATA,
2172 GP_0_27_DATA, GP_0_26_DATA, GP_0_25_DATA, GP_0_24_DATA,
2173 GP_0_23_DATA, GP_0_22_DATA, GP_0_21_DATA, GP_0_20_DATA,
2174 GP_0_19_DATA, GP_0_18_DATA, GP_0_17_DATA, GP_0_16_DATA,
2175 GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
2176 GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
2177 GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
2178 GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
2179 },
2180 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
2181 0, 0, 0, 0,
2182 0, 0, 0, 0,
2183 0, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
2184 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
2185 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
2186 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
2187 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
2188 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
2189 },
2190 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } },
2191 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
2192 0, 0, 0, 0,
2193 GP_3_27_DATA, GP_3_26_DATA, GP_3_25_DATA, GP_3_24_DATA,
2194 GP_3_23_DATA, GP_3_22_DATA, GP_3_21_DATA, GP_3_20_DATA,
2195 GP_3_19_DATA, GP_3_18_DATA, GP_3_17_DATA, GP_3_16_DATA,
2196 GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
2197 GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
2198 GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
2199 GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
2200 },
2201 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
2202 0, 0, 0, 0,
2203 0, 0, 0, 0,
2204 0, 0, 0, 0,
2205 0, 0, 0, GP_4_16_DATA,
2206 GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
2207 GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
2208 GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
2209 GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
2210 },
2211 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
2212 0, 0, 0, 0,
2213 0, 0, 0, 0,
2214 0, 0, 0, 0,
2215 0, 0, 0, GP_5_16_DATA,
2216 GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
2217 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
2218 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
2219 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
2220 },
2221 { PINMUX_DATA_REG("INDT6", 0xE6055108, 32) {
2222 0, 0, 0, 0,
2223 0, 0, 0, 0,
2224 0, 0, 0, 0,
2225 0, 0, 0, GP_6_16_DATA,
2226 GP_6_15_DATA, GP_6_14_DATA, GP_6_13_DATA, GP_6_12_DATA,
2227 GP_6_11_DATA, GP_6_10_DATA, GP_6_9_DATA, GP_6_8_DATA,
2228 GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA,
2229 GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA }
2230 },
2231 { PINMUX_DATA_REG("INDT7", 0xE6055208, 32) {
2232 0, 0, 0, 0,
2233 0, 0, 0, 0,
2234 0, 0, 0, 0,
2235 0, 0, 0, GP_7_16_DATA,
2236 GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA,
2237 GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA,
2238 GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA,
2239 GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
2240 },
2241 { PINMUX_DATA_REG("INDT8", 0xE6055308, 32) {
2242 0, 0, 0, 0,
2243 0, 0, 0, 0,
2244 0, 0, 0, 0,
2245 0, 0, 0, GP_8_16_DATA,
2246 GP_8_15_DATA, GP_8_14_DATA, GP_8_13_DATA, GP_8_12_DATA,
2247 GP_8_11_DATA, GP_8_10_DATA, GP_8_9_DATA, GP_8_8_DATA,
2248 GP_8_7_DATA, GP_8_6_DATA, GP_8_5_DATA, GP_8_4_DATA,
2249 GP_8_3_DATA, GP_8_2_DATA, GP_8_1_DATA, GP_8_0_DATA }
2250 },
2251 { PINMUX_DATA_REG("INDT9", 0xE6055408, 32) {
2252 0, 0, 0, 0,
2253 0, 0, 0, 0,
2254 0, 0, 0, 0,
2255 0, 0, 0, GP_9_16_DATA,
2256 GP_9_15_DATA, GP_9_14_DATA, GP_9_13_DATA, GP_9_12_DATA,
2257 GP_9_11_DATA, GP_9_10_DATA, GP_9_9_DATA, GP_9_8_DATA,
2258 GP_9_7_DATA, GP_9_6_DATA, GP_9_5_DATA, GP_9_4_DATA,
2259 GP_9_3_DATA, GP_9_2_DATA, GP_9_1_DATA, GP_9_0_DATA }
2260 },
2261 { PINMUX_DATA_REG("INDT10", 0xE6055508, 32) { GP_INDT(10) } },
2262 { PINMUX_DATA_REG("INDT11", 0xE6055608, 32) {
2263 0, 0, GP_11_29_DATA, GP_11_28_DATA,
2264 GP_11_27_DATA, GP_11_26_DATA, GP_11_25_DATA, GP_11_24_DATA,
2265 GP_11_23_DATA, GP_11_22_DATA, GP_11_21_DATA, GP_11_20_DATA,
2266 GP_11_19_DATA, GP_11_18_DATA, GP_11_17_DATA, GP_11_16_DATA,
2267 GP_11_15_DATA, GP_11_14_DATA, GP_11_13_DATA, GP_11_12_DATA,
2268 GP_11_11_DATA, GP_11_10_DATA, GP_11_9_DATA, GP_11_8_DATA,
2269 GP_11_7_DATA, GP_11_6_DATA, GP_11_5_DATA, GP_11_4_DATA,
2270 GP_11_3_DATA, GP_11_2_DATA, GP_11_1_DATA, GP_11_0_DATA }
2271 },
2272 { },
2273 };
2274
2275 static struct pinmux_info r8a7792_pinmux_info = {
2276 .name = "r8a7792_pfc",
2277
2278 .unlock_reg = 0xe6060000, /* PMMR */
2279
2280 .reserved_id = PINMUX_RESERVED,
2281 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2282 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2283 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2284 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2285 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2286
2287 .first_gpio = GPIO_GP_0_0,
2288 .last_gpio = GPIO_FN_AUDIO_CLKB,
2289
2290 .gpios = pinmux_gpios,
2291 .cfg_regs = pinmux_config_regs,
2292 .data_regs = pinmux_data_regs,
2293
2294 .gpio_data = pinmux_data,
2295 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2296 };
2297
r8a7792_pinmux_init(void)2298 void r8a7792_pinmux_init(void)
2299 {
2300 register_pinmux(&r8a7792_pinmux_info);
2301 }
2302
2303