1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * arch/arm/include/asm/arch-rmobile/rcar-mstp.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013, 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5*4882a593Smuzhiyun * Copyright (C) 2013, 2014 Renesas Electronics Corporation 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __ASM_ARCH_RCAR_MSTP_H 11*4882a593Smuzhiyun #define __ASM_ARCH_RCAR_MSTP_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define mstp_setbits(type, addr, saddr, set) \ 14*4882a593Smuzhiyun out_##type((saddr), in_##type(addr) | (set)) 15*4882a593Smuzhiyun #define mstp_clrbits(type, addr, saddr, clear) \ 16*4882a593Smuzhiyun out_##type((saddr), in_##type(addr) & ~(clear)) 17*4882a593Smuzhiyun #define mstp_setclrbits(type, addr, set, clear) \ 18*4882a593Smuzhiyun out_##type((addr), (in_##type(addr) | (set)) & ~(clear)) 19*4882a593Smuzhiyun #define mstp_setbits_le32(addr, saddr, set) \ 20*4882a593Smuzhiyun mstp_setbits(le32, addr, saddr, set) 21*4882a593Smuzhiyun #define mstp_clrbits_le32(addr, saddr, clear) \ 22*4882a593Smuzhiyun mstp_clrbits(le32, addr, saddr, clear) 23*4882a593Smuzhiyun #define mstp_setclrbits_le32(addr, set, clear) \ 24*4882a593Smuzhiyun mstp_setclrbits(le32, addr, set, clear) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #ifndef CONFIG_SMSTP0_ENA 27*4882a593Smuzhiyun #define CONFIG_SMSTP0_ENA 0x00 28*4882a593Smuzhiyun #endif 29*4882a593Smuzhiyun #ifndef CONFIG_SMSTP1_ENA 30*4882a593Smuzhiyun #define CONFIG_SMSTP1_ENA 0x00 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun #ifndef CONFIG_SMSTP2_ENA 33*4882a593Smuzhiyun #define CONFIG_SMSTP2_ENA 0x00 34*4882a593Smuzhiyun #endif 35*4882a593Smuzhiyun #ifndef CONFIG_SMSTP3_ENA 36*4882a593Smuzhiyun #define CONFIG_SMSTP3_ENA 0x00 37*4882a593Smuzhiyun #endif 38*4882a593Smuzhiyun #ifndef CONFIG_SMSTP4_ENA 39*4882a593Smuzhiyun #define CONFIG_SMSTP4_ENA 0x00 40*4882a593Smuzhiyun #endif 41*4882a593Smuzhiyun #ifndef CONFIG_SMSTP5_ENA 42*4882a593Smuzhiyun #define CONFIG_SMSTP5_ENA 0x00 43*4882a593Smuzhiyun #endif 44*4882a593Smuzhiyun #ifndef CONFIG_SMSTP6_ENA 45*4882a593Smuzhiyun #define CONFIG_SMSTP6_ENA 0x00 46*4882a593Smuzhiyun #endif 47*4882a593Smuzhiyun #ifndef CONFIG_SMSTP7_ENA 48*4882a593Smuzhiyun #define CONFIG_SMSTP7_ENA 0x00 49*4882a593Smuzhiyun #endif 50*4882a593Smuzhiyun #ifndef CONFIG_SMSTP8_ENA 51*4882a593Smuzhiyun #define CONFIG_SMSTP8_ENA 0x00 52*4882a593Smuzhiyun #endif 53*4882a593Smuzhiyun #ifndef CONFIG_SMSTP9_ENA 54*4882a593Smuzhiyun #define CONFIG_SMSTP9_ENA 0x00 55*4882a593Smuzhiyun #endif 56*4882a593Smuzhiyun #ifndef CONFIG_SMSTP10_ENA 57*4882a593Smuzhiyun #define CONFIG_SMSTP10_ENA 0x00 58*4882a593Smuzhiyun #endif 59*4882a593Smuzhiyun #ifndef CONFIG_SMSTP11_ENA 60*4882a593Smuzhiyun #define CONFIG_SMSTP11_ENA 0x00 61*4882a593Smuzhiyun #endif 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #ifndef CONFIG_RMSTP0_ENA 64*4882a593Smuzhiyun #define CONFIG_RMSTP0_ENA 0x00 65*4882a593Smuzhiyun #endif 66*4882a593Smuzhiyun #ifndef CONFIG_RMSTP1_ENA 67*4882a593Smuzhiyun #define CONFIG_RMSTP1_ENA 0x00 68*4882a593Smuzhiyun #endif 69*4882a593Smuzhiyun #ifndef CONFIG_RMSTP2_ENA 70*4882a593Smuzhiyun #define CONFIG_RMSTP2_ENA 0x00 71*4882a593Smuzhiyun #endif 72*4882a593Smuzhiyun #ifndef CONFIG_RMSTP3_ENA 73*4882a593Smuzhiyun #define CONFIG_RMSTP3_ENA 0x00 74*4882a593Smuzhiyun #endif 75*4882a593Smuzhiyun #ifndef CONFIG_RMSTP4_ENA 76*4882a593Smuzhiyun #define CONFIG_RMSTP4_ENA 0x00 77*4882a593Smuzhiyun #endif 78*4882a593Smuzhiyun #ifndef CONFIG_RMSTP5_ENA 79*4882a593Smuzhiyun #define CONFIG_RMSTP5_ENA 0x00 80*4882a593Smuzhiyun #endif 81*4882a593Smuzhiyun #ifndef CONFIG_RMSTP6_ENA 82*4882a593Smuzhiyun #define CONFIG_RMSTP6_ENA 0x00 83*4882a593Smuzhiyun #endif 84*4882a593Smuzhiyun #ifndef CONFIG_RMSTP7_ENA 85*4882a593Smuzhiyun #define CONFIG_RMSTP7_ENA 0x00 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun #ifndef CONFIG_RMSTP8_ENA 88*4882a593Smuzhiyun #define CONFIG_RMSTP8_ENA 0x00 89*4882a593Smuzhiyun #endif 90*4882a593Smuzhiyun #ifndef CONFIG_RMSTP9_ENA 91*4882a593Smuzhiyun #define CONFIG_RMSTP9_ENA 0x00 92*4882a593Smuzhiyun #endif 93*4882a593Smuzhiyun #ifndef CONFIG_RMSTP10_ENA 94*4882a593Smuzhiyun #define CONFIG_RMSTP10_ENA 0x00 95*4882a593Smuzhiyun #endif 96*4882a593Smuzhiyun #ifndef CONFIG_RMSTP11_ENA 97*4882a593Smuzhiyun #define CONFIG_RMSTP11_ENA 0x00 98*4882a593Smuzhiyun #endif 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun struct mstp_ctl { 101*4882a593Smuzhiyun u32 s_addr; 102*4882a593Smuzhiyun u32 s_dis; 103*4882a593Smuzhiyun u32 s_ena; 104*4882a593Smuzhiyun u32 r_addr; 105*4882a593Smuzhiyun u32 r_dis; 106*4882a593Smuzhiyun u32 r_ena; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #endif /* __ASM_ARCH_RCAR_MSTP_H */ 110