1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * arch/arm/cpu/armv7/rmobile/cpu_info-rcar.c 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013,2014 Renesas Electronics Corporation 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #include <common.h> 9*4882a593Smuzhiyun #include <asm/io.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define PRR 0xFF000044 12*4882a593Smuzhiyun #define PRR_MASK 0x7fff 13*4882a593Smuzhiyun #define R8A7796_REV_1_0 0x5200 14*4882a593Smuzhiyun #define R8A7796_REV_1_1 0x5210 15*4882a593Smuzhiyun rmobile_get_cpu_type(void)16*4882a593Smuzhiyunu32 rmobile_get_cpu_type(void) 17*4882a593Smuzhiyun { 18*4882a593Smuzhiyun return (readl(PRR) & 0x00007F00) >> 8; 19*4882a593Smuzhiyun } 20*4882a593Smuzhiyun rmobile_get_cpu_rev_integer(void)21*4882a593Smuzhiyunu32 rmobile_get_cpu_rev_integer(void) 22*4882a593Smuzhiyun { 23*4882a593Smuzhiyun const u32 prr = readl(PRR); 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun if ((prr & PRR_MASK) == R8A7796_REV_1_1) 26*4882a593Smuzhiyun return 1; 27*4882a593Smuzhiyun else 28*4882a593Smuzhiyun return ((prr & 0x000000F0) >> 4) + 1; 29*4882a593Smuzhiyun } 30*4882a593Smuzhiyun rmobile_get_cpu_rev_fraction(void)31*4882a593Smuzhiyunu32 rmobile_get_cpu_rev_fraction(void) 32*4882a593Smuzhiyun { 33*4882a593Smuzhiyun const u32 prr = readl(PRR); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun if ((prr & PRR_MASK) == R8A7796_REV_1_1) 36*4882a593Smuzhiyun return 1; 37*4882a593Smuzhiyun else 38*4882a593Smuzhiyun return prr & 0x0000000F; 39*4882a593Smuzhiyun } 40