1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * OMAP5 boot
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/omap_common.h>
12*4882a593Smuzhiyun #include <spl.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun static u32 boot_devices[] = {
15*4882a593Smuzhiyun #if defined(CONFIG_DRA7XX)
16*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
17*4882a593Smuzhiyun BOOT_DEVICE_NAND,
18*4882a593Smuzhiyun BOOT_DEVICE_MMC1,
19*4882a593Smuzhiyun BOOT_DEVICE_SATA,
20*4882a593Smuzhiyun BOOT_DEVICE_XIP,
21*4882a593Smuzhiyun BOOT_DEVICE_XIP,
22*4882a593Smuzhiyun BOOT_DEVICE_SPI,
23*4882a593Smuzhiyun BOOT_DEVICE_SPI,
24*4882a593Smuzhiyun #else
25*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
26*4882a593Smuzhiyun BOOT_DEVICE_NAND,
27*4882a593Smuzhiyun BOOT_DEVICE_MMC1,
28*4882a593Smuzhiyun BOOT_DEVICE_SATA,
29*4882a593Smuzhiyun BOOT_DEVICE_XIP,
30*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
31*4882a593Smuzhiyun BOOT_DEVICE_XIPWAIT,
32*4882a593Smuzhiyun #endif
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
omap_sys_boot_device(void)35*4882a593Smuzhiyun u32 omap_sys_boot_device(void)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun u32 sys_boot;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* Grab the first 4 bits of the status register for SYS_BOOT. */
40*4882a593Smuzhiyun sys_boot = readl((u32 *) (*ctrl)->control_status) & ((1 << 4) - 1);
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun if (sys_boot >= (sizeof(boot_devices) / sizeof(u32)))
43*4882a593Smuzhiyun return BOOT_DEVICE_NONE;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun return boot_devices[sys_boot];
46*4882a593Smuzhiyun }
47