1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * DaVinci EMAC initialization. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * (C) Copyright 2011, Ilya Yanok, Emcraft Systems 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <common.h> 11*4882a593Smuzhiyun #include <netdev.h> 12*4882a593Smuzhiyun #include <asm/io.h> 13*4882a593Smuzhiyun #include <asm/arch/am35x_def.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * Initializes on-chip ethernet controllers. 17*4882a593Smuzhiyun * to override, implement board_eth_init() 18*4882a593Smuzhiyun */ cpu_eth_init(bd_t * bis)19*4882a593Smuzhiyunint cpu_eth_init(bd_t *bis) 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun u32 reset; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* ensure that the module is out of reset */ 24*4882a593Smuzhiyun reset = readl(&am35x_scm_general_regs->ip_sw_reset); 25*4882a593Smuzhiyun reset &= ~CPGMACSS_SW_RST; 26*4882a593Smuzhiyun writel(reset, &am35x_scm_general_regs->ip_sw_reset); 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun return davinci_emac_initialize(); 29*4882a593Smuzhiyun } 30