1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * OMAP3 boot
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
12*4882a593Smuzhiyun #include <spl.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun static u32 boot_devices[] = {
15*4882a593Smuzhiyun BOOT_DEVICE_ONENAND,
16*4882a593Smuzhiyun BOOT_DEVICE_NAND,
17*4882a593Smuzhiyun BOOT_DEVICE_ONENAND,
18*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
19*4882a593Smuzhiyun BOOT_DEVICE_ONENAND,
20*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
21*4882a593Smuzhiyun BOOT_DEVICE_MMC1,
22*4882a593Smuzhiyun BOOT_DEVICE_XIP,
23*4882a593Smuzhiyun BOOT_DEVICE_XIPWAIT,
24*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
25*4882a593Smuzhiyun BOOT_DEVICE_XIP,
26*4882a593Smuzhiyun BOOT_DEVICE_XIPWAIT,
27*4882a593Smuzhiyun BOOT_DEVICE_NAND,
28*4882a593Smuzhiyun BOOT_DEVICE_XIP,
29*4882a593Smuzhiyun BOOT_DEVICE_XIPWAIT,
30*4882a593Smuzhiyun BOOT_DEVICE_NAND,
31*4882a593Smuzhiyun BOOT_DEVICE_ONENAND,
32*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
33*4882a593Smuzhiyun BOOT_DEVICE_MMC1,
34*4882a593Smuzhiyun BOOT_DEVICE_XIP,
35*4882a593Smuzhiyun BOOT_DEVICE_XIPWAIT,
36*4882a593Smuzhiyun BOOT_DEVICE_NAND,
37*4882a593Smuzhiyun BOOT_DEVICE_ONENAND,
38*4882a593Smuzhiyun BOOT_DEVICE_MMC2,
39*4882a593Smuzhiyun BOOT_DEVICE_MMC1,
40*4882a593Smuzhiyun BOOT_DEVICE_XIP,
41*4882a593Smuzhiyun BOOT_DEVICE_XIPWAIT,
42*4882a593Smuzhiyun BOOT_DEVICE_NAND,
43*4882a593Smuzhiyun BOOT_DEVICE_MMC2_2,
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
omap_sys_boot_device(void)46*4882a593Smuzhiyun u32 omap_sys_boot_device(void)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
49*4882a593Smuzhiyun u32 sys_boot;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Grab the first 5 bits of the status register for SYS_BOOT. */
52*4882a593Smuzhiyun sys_boot = readl(&ctrl_base->status) & ((1 << 5) - 1);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun if (sys_boot >= (sizeof(boot_devices) / sizeof(u32)))
55*4882a593Smuzhiyun return BOOT_DEVICE_NONE;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return boot_devices[sys_boot];
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
omap_reboot_mode(char * mode,unsigned int length)60*4882a593Smuzhiyun int omap_reboot_mode(char *mode, unsigned int length)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun u32 reboot_mode;
63*4882a593Smuzhiyun char c;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if (length < 2)
66*4882a593Smuzhiyun return -1;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun reboot_mode = readl((u32 *)(OMAP34XX_SCRATCHPAD +
69*4882a593Smuzhiyun OMAP_REBOOT_REASON_OFFSET));
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun c = (reboot_mode >> 24) & 0xff;
72*4882a593Smuzhiyun if (c != 'B')
73*4882a593Smuzhiyun return -1;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun c = (reboot_mode >> 16) & 0xff;
76*4882a593Smuzhiyun if (c != 'M')
77*4882a593Smuzhiyun return -1;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun c = reboot_mode & 0xff;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun mode[0] = c;
82*4882a593Smuzhiyun mode[1] = '\0';
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
omap_reboot_mode_clear(void)87*4882a593Smuzhiyun int omap_reboot_mode_clear(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun writel(0, (u32 *)(OMAP34XX_SCRATCHPAD + OMAP_REBOOT_REASON_OFFSET));
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun return 0;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
omap_reboot_mode_store(char * mode)94*4882a593Smuzhiyun int omap_reboot_mode_store(char *mode)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun u32 reboot_mode;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun reboot_mode = 'B' << 24 | 'M' << 16 | mode[0];
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun writel(reboot_mode, (u32 *)(OMAP34XX_SCRATCHPAD +
101*4882a593Smuzhiyun OMAP_REBOOT_REASON_OFFSET));
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return 0;
104*4882a593Smuzhiyun }
105