1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * boot-common.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Common bootmode functions for omap based boards
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <ahci.h>
13*4882a593Smuzhiyun #include <environment.h>
14*4882a593Smuzhiyun #include <spl.h>
15*4882a593Smuzhiyun #include <asm/omap_common.h>
16*4882a593Smuzhiyun #include <asm/arch/omap.h>
17*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
18*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
19*4882a593Smuzhiyun #include <watchdog.h>
20*4882a593Smuzhiyun #include <scsi.h>
21*4882a593Smuzhiyun #include <i2c.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
24*4882a593Smuzhiyun
omap_sys_boot_device(void)25*4882a593Smuzhiyun __weak u32 omap_sys_boot_device(void)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun return BOOT_DEVICE_NONE;
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
save_omap_boot_params(void)30*4882a593Smuzhiyun void save_omap_boot_params(void)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
33*4882a593Smuzhiyun struct omap_boot_parameters *omap_boot_params;
34*4882a593Smuzhiyun int sys_boot_device = 0;
35*4882a593Smuzhiyun u32 boot_device;
36*4882a593Smuzhiyun u32 boot_mode;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun if ((boot_params < NON_SECURE_SRAM_START) ||
39*4882a593Smuzhiyun (boot_params > NON_SECURE_SRAM_END))
40*4882a593Smuzhiyun return;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun omap_boot_params = (struct omap_boot_parameters *)boot_params;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun boot_device = omap_boot_params->boot_device;
45*4882a593Smuzhiyun boot_mode = MMCSD_MODE_UNDEFINED;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* Boot device */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #ifdef BOOT_DEVICE_NAND_I2C
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
52*4882a593Smuzhiyun * Otherwise the SPL boot IF can't handle this device correctly.
53*4882a593Smuzhiyun * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
54*4882a593Smuzhiyun * Draco leads to this boot-device passed to SPL from the BootROM.
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun if (boot_device == BOOT_DEVICE_NAND_I2C)
57*4882a593Smuzhiyun boot_device = BOOT_DEVICE_NAND;
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun #ifdef BOOT_DEVICE_QSPI_4
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun * We get different values for QSPI_1 and QSPI_4 being used, but
62*4882a593Smuzhiyun * don't actually care about this difference. Rather than
63*4882a593Smuzhiyun * mangle the later code, if we're coming in as QSPI_4 just
64*4882a593Smuzhiyun * change to the QSPI_1 value.
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun if (boot_device == BOOT_DEVICE_QSPI_4)
67*4882a593Smuzhiyun boot_device = BOOT_DEVICE_SPI;
68*4882a593Smuzhiyun #endif
69*4882a593Smuzhiyun #ifdef CONFIG_TI816X
70*4882a593Smuzhiyun /*
71*4882a593Smuzhiyun * On PG2.0 and later TI816x the values we get when booting are not the
72*4882a593Smuzhiyun * same as on PG1.0, which is what the defines are based on. Update
73*4882a593Smuzhiyun * them as needed.
74*4882a593Smuzhiyun */
75*4882a593Smuzhiyun if (get_cpu_rev() != 1) {
76*4882a593Smuzhiyun if (boot_device == 0x05) {
77*4882a593Smuzhiyun omap_boot_params->boot_device = BOOT_DEVICE_NAND;
78*4882a593Smuzhiyun boot_device = BOOT_DEVICE_NAND;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun if (boot_device == 0x08) {
81*4882a593Smuzhiyun omap_boot_params->boot_device = BOOT_DEVICE_MMC1;
82*4882a593Smuzhiyun boot_device = BOOT_DEVICE_MMC1;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun #endif
86*4882a593Smuzhiyun /*
87*4882a593Smuzhiyun * When booting from peripheral booting, the boot device is not usable
88*4882a593Smuzhiyun * as-is (unless there is support for it), so the boot device is instead
89*4882a593Smuzhiyun * figured out using the SYS_BOOT pins.
90*4882a593Smuzhiyun */
91*4882a593Smuzhiyun switch (boot_device) {
92*4882a593Smuzhiyun #if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
93*4882a593Smuzhiyun case BOOT_DEVICE_UART:
94*4882a593Smuzhiyun sys_boot_device = 1;
95*4882a593Smuzhiyun break;
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun #if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_SUPPORT)
98*4882a593Smuzhiyun case BOOT_DEVICE_USB:
99*4882a593Smuzhiyun sys_boot_device = 1;
100*4882a593Smuzhiyun break;
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun #if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USBETH_SUPPORT)
103*4882a593Smuzhiyun case BOOT_DEVICE_USBETH:
104*4882a593Smuzhiyun sys_boot_device = 1;
105*4882a593Smuzhiyun break;
106*4882a593Smuzhiyun #endif
107*4882a593Smuzhiyun #if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
108*4882a593Smuzhiyun case BOOT_DEVICE_CPGMAC:
109*4882a593Smuzhiyun sys_boot_device = 1;
110*4882a593Smuzhiyun break;
111*4882a593Smuzhiyun #endif
112*4882a593Smuzhiyun #if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU)
113*4882a593Smuzhiyun case BOOT_DEVICE_DFU:
114*4882a593Smuzhiyun sys_boot_device = 1;
115*4882a593Smuzhiyun break;
116*4882a593Smuzhiyun #endif
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (sys_boot_device) {
120*4882a593Smuzhiyun boot_device = omap_sys_boot_device();
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /* MMC raw mode will fallback to FS mode. */
123*4882a593Smuzhiyun if ((boot_device >= MMC_BOOT_DEVICES_START) &&
124*4882a593Smuzhiyun (boot_device <= MMC_BOOT_DEVICES_END))
125*4882a593Smuzhiyun boot_mode = MMCSD_MODE_RAW;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun gd->arch.omap_boot_device = boot_device;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* Boot mode */
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun #ifdef CONFIG_OMAP34XX
133*4882a593Smuzhiyun if ((boot_device >= MMC_BOOT_DEVICES_START) &&
134*4882a593Smuzhiyun (boot_device <= MMC_BOOT_DEVICES_END)) {
135*4882a593Smuzhiyun switch (boot_device) {
136*4882a593Smuzhiyun case BOOT_DEVICE_MMC1:
137*4882a593Smuzhiyun boot_mode = MMCSD_MODE_FS;
138*4882a593Smuzhiyun break;
139*4882a593Smuzhiyun case BOOT_DEVICE_MMC2:
140*4882a593Smuzhiyun boot_mode = MMCSD_MODE_RAW;
141*4882a593Smuzhiyun break;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun #else
145*4882a593Smuzhiyun /*
146*4882a593Smuzhiyun * If the boot device was dynamically changed and doesn't match what
147*4882a593Smuzhiyun * the bootrom initially booted, we cannot use the boot device
148*4882a593Smuzhiyun * descriptor to figure out the boot mode.
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun if ((boot_device == omap_boot_params->boot_device) &&
151*4882a593Smuzhiyun (boot_device >= MMC_BOOT_DEVICES_START) &&
152*4882a593Smuzhiyun (boot_device <= MMC_BOOT_DEVICES_END)) {
153*4882a593Smuzhiyun boot_params = omap_boot_params->boot_device_descriptor;
154*4882a593Smuzhiyun if ((boot_params < NON_SECURE_SRAM_START) ||
155*4882a593Smuzhiyun (boot_params > NON_SECURE_SRAM_END))
156*4882a593Smuzhiyun return;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
159*4882a593Smuzhiyun if ((boot_params < NON_SECURE_SRAM_START) ||
160*4882a593Smuzhiyun (boot_params > NON_SECURE_SRAM_END))
161*4882a593Smuzhiyun return;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun if (boot_mode != MMCSD_MODE_FS &&
166*4882a593Smuzhiyun boot_mode != MMCSD_MODE_RAW)
167*4882a593Smuzhiyun #ifdef CONFIG_SUPPORT_EMMC_BOOT
168*4882a593Smuzhiyun boot_mode = MMCSD_MODE_EMMCBOOT;
169*4882a593Smuzhiyun #else
170*4882a593Smuzhiyun boot_mode = MMCSD_MODE_UNDEFINED;
171*4882a593Smuzhiyun #endif
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun #endif
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun gd->arch.omap_boot_mode = boot_mode;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun #if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
178*4882a593Smuzhiyun !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* CH flags */
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
183*4882a593Smuzhiyun #endif
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
spl_boot_device(void)187*4882a593Smuzhiyun u32 spl_boot_device(void)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun return gd->arch.omap_boot_device;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
spl_boot_mode(const u32 boot_device)192*4882a593Smuzhiyun u32 spl_boot_mode(const u32 boot_device)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun return gd->arch.omap_boot_mode;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
spl_board_init(void)197*4882a593Smuzhiyun void spl_board_init(void)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun /* Prepare console output */
200*4882a593Smuzhiyun preloader_console_init();
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
203*4882a593Smuzhiyun gpmc_init();
204*4882a593Smuzhiyun #endif
205*4882a593Smuzhiyun #ifdef CONFIG_SPL_I2C_SUPPORT
206*4882a593Smuzhiyun i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
207*4882a593Smuzhiyun #endif
208*4882a593Smuzhiyun #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
209*4882a593Smuzhiyun arch_misc_init();
210*4882a593Smuzhiyun #endif
211*4882a593Smuzhiyun #if defined(CONFIG_HW_WATCHDOG)
212*4882a593Smuzhiyun hw_watchdog_init();
213*4882a593Smuzhiyun #endif
214*4882a593Smuzhiyun #ifdef CONFIG_AM33XX
215*4882a593Smuzhiyun am33xx_spl_board_init();
216*4882a593Smuzhiyun #endif
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
jump_to_image_no_args(struct spl_image_info * spl_image)219*4882a593Smuzhiyun void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun typedef void __noreturn (*image_entry_noargs_t)(u32 *);
222*4882a593Smuzhiyun image_entry_noargs_t image_entry =
223*4882a593Smuzhiyun (image_entry_noargs_t) spl_image->entry_point;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun debug("image entry point: 0x%lX\n", spl_image->entry_point);
228*4882a593Smuzhiyun /* Pass the saved boot_params from rom code */
229*4882a593Smuzhiyun image_entry((u32 *)boot_params);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun #endif
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun #ifdef CONFIG_SCSI_AHCI_PLAT
arch_preboot_os(void)234*4882a593Smuzhiyun void arch_preboot_os(void)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun ahci_reset((void __iomem *)DWC_AHSATA_BASE);
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun #endif
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun #if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE)
fb_set_reboot_flag(void)241*4882a593Smuzhiyun int fb_set_reboot_flag(void)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun printf("Setting reboot to fastboot flag ...\n");
244*4882a593Smuzhiyun env_set("dofastboot", "1");
245*4882a593Smuzhiyun env_save();
246*4882a593Smuzhiyun return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun #endif
249