1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <common.h> 8*4882a593Smuzhiyun #include <dm.h> 9*4882a593Smuzhiyun #include <debug_uart.h> 10*4882a593Smuzhiyun #include <fdtdec.h> 11*4882a593Smuzhiyun #include <spl.h> 12*4882a593Smuzhiyun #include <asm/io.h> 13*4882a593Smuzhiyun #include <asm/arch/cpu.h> 14*4882a593Smuzhiyun #include <asm/arch/soc.h> 15*4882a593Smuzhiyun get_boot_device(void)16*4882a593Smuzhiyunstatic u32 get_boot_device(void) 17*4882a593Smuzhiyun { 18*4882a593Smuzhiyun u32 val; 19*4882a593Smuzhiyun u32 boot_device; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* 22*4882a593Smuzhiyun * First check, if UART boot-mode is active. This can only 23*4882a593Smuzhiyun * be done, via the bootrom error register. Here the 24*4882a593Smuzhiyun * MSB marks if the UART mode is active. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun val = readl(CONFIG_BOOTROM_ERR_REG); 27*4882a593Smuzhiyun boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; 28*4882a593Smuzhiyun debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); 29*4882a593Smuzhiyun if (boot_device == BOOTROM_ERR_MODE_UART) 30*4882a593Smuzhiyun return BOOT_DEVICE_UART; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * Now check the SAR register for the strapped boot-device 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ 36*4882a593Smuzhiyun boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; 37*4882a593Smuzhiyun debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); 38*4882a593Smuzhiyun switch (boot_device) { 39*4882a593Smuzhiyun #ifdef CONFIG_SPL_MMC_SUPPORT 40*4882a593Smuzhiyun case BOOT_FROM_MMC: 41*4882a593Smuzhiyun case BOOT_FROM_MMC_ALT: 42*4882a593Smuzhiyun return BOOT_DEVICE_MMC1; 43*4882a593Smuzhiyun #endif 44*4882a593Smuzhiyun case BOOT_FROM_UART: 45*4882a593Smuzhiyun return BOOT_DEVICE_UART; 46*4882a593Smuzhiyun case BOOT_FROM_SPI: 47*4882a593Smuzhiyun default: 48*4882a593Smuzhiyun return BOOT_DEVICE_SPI; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun spl_boot_device(void)52*4882a593Smuzhiyunu32 spl_boot_device(void) 53*4882a593Smuzhiyun { 54*4882a593Smuzhiyun return get_boot_device(); 55*4882a593Smuzhiyun } 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #ifdef CONFIG_SPL_MMC_SUPPORT spl_boot_mode(const u32 boot_device)58*4882a593Smuzhiyunu32 spl_boot_mode(const u32 boot_device) 59*4882a593Smuzhiyun { 60*4882a593Smuzhiyun return MMCSD_MODE_RAW; 61*4882a593Smuzhiyun } 62*4882a593Smuzhiyun #endif 63*4882a593Smuzhiyun board_init_f(ulong dummy)64*4882a593Smuzhiyunvoid board_init_f(ulong dummy) 65*4882a593Smuzhiyun { 66*4882a593Smuzhiyun int ret; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* 69*4882a593Smuzhiyun * Pin muxing needs to be done before UART output, since 70*4882a593Smuzhiyun * on A38x the UART pins need some re-muxing for output 71*4882a593Smuzhiyun * to work. 72*4882a593Smuzhiyun */ 73*4882a593Smuzhiyun board_early_init_f(); 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* Example code showing how to enable the debug UART on MVEBU */ 76*4882a593Smuzhiyun #ifdef EARLY_UART 77*4882a593Smuzhiyun /* 78*4882a593Smuzhiyun * Debug UART can be used from here if required: 79*4882a593Smuzhiyun * 80*4882a593Smuzhiyun * debug_uart_init(); 81*4882a593Smuzhiyun * printch('a'); 82*4882a593Smuzhiyun * printhex8(0x1234); 83*4882a593Smuzhiyun * printascii("string"); 84*4882a593Smuzhiyun */ 85*4882a593Smuzhiyun #endif 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun ret = spl_init(); 88*4882a593Smuzhiyun if (ret) { 89*4882a593Smuzhiyun debug("spl_init() failed: %d\n", ret); 90*4882a593Smuzhiyun hang(); 91*4882a593Smuzhiyun } 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* Use special translation offset for SPL */ 94*4882a593Smuzhiyun dm_set_translation_offset(0xd0000000 - 0xf1000000); 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun preloader_console_init(); 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun timer_init(); 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* Armada 375 does not support SerDes and DDR3 init yet */ 101*4882a593Smuzhiyun #if !defined(CONFIG_ARMADA_375) 102*4882a593Smuzhiyun /* First init the serdes PHY's */ 103*4882a593Smuzhiyun serdes_phy_config(); 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* Setup DDR */ 106*4882a593Smuzhiyun ddr3_init(); 107*4882a593Smuzhiyun #endif 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* 110*4882a593Smuzhiyun * Return to the BootROM to continue the Marvell xmodem 111*4882a593Smuzhiyun * UART boot protocol. As initiated by the kwboot tool. 112*4882a593Smuzhiyun * 113*4882a593Smuzhiyun * This can only be done by the BootROM and not by the 114*4882a593Smuzhiyun * U-Boot SPL infrastructure, since the beginning of the 115*4882a593Smuzhiyun * image is already read and interpreted by the BootROM. 116*4882a593Smuzhiyun * SPL has no chance to receive this information. So we 117*4882a593Smuzhiyun * need to return to the BootROM to enable this xmodem 118*4882a593Smuzhiyun * UART download. 119*4882a593Smuzhiyun */ 120*4882a593Smuzhiyun if (get_boot_device() == BOOT_DEVICE_UART) 121*4882a593Smuzhiyun return_to_bootrom(); 122*4882a593Smuzhiyun } 123