1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2009
3*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com>
4*4882a593Smuzhiyun * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/arch/cpu.h>
12*4882a593Smuzhiyun #include <asm/arch/soc.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun * mvebu_config_gpio - GPIO configuration
16*4882a593Smuzhiyun */
mvebu_config_gpio(u32 gpp0_oe_val,u32 gpp1_oe_val,u32 gpp0_oe,u32 gpp1_oe)17*4882a593Smuzhiyun void mvebu_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val,
18*4882a593Smuzhiyun u32 gpp0_oe, u32 gpp1_oe)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun struct kwgpio_registers *gpio0reg =
21*4882a593Smuzhiyun (struct kwgpio_registers *)MVEBU_GPIO0_BASE;
22*4882a593Smuzhiyun struct kwgpio_registers *gpio1reg =
23*4882a593Smuzhiyun (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* Init GPIOS to default values as per board requirement */
26*4882a593Smuzhiyun writel(gpp0_oe_val, &gpio0reg->dout);
27*4882a593Smuzhiyun writel(gpp1_oe_val, &gpio1reg->dout);
28*4882a593Smuzhiyun writel(gpp0_oe, &gpio0reg->oe);
29*4882a593Smuzhiyun writel(gpp1_oe, &gpio1reg->oe);
30*4882a593Smuzhiyun }
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