1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2009 3*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com> 4*4882a593Smuzhiyun * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Header file for Feroceon CPU core 88FR131 Based KW88F6281 SOC. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef _ASM_ARCH_KW88F6281_H 12*4882a593Smuzhiyun #define _ASM_ARCH_KW88F6281_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* SOC specific definitions */ 15*4882a593Smuzhiyun #define KW88F6281_REGS_PHYS_BASE 0xf1000000 16*4882a593Smuzhiyun #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* TCLK Core Clock definition */ 19*4882a593Smuzhiyun #ifndef CONFIG_SYS_TCLK 20*4882a593Smuzhiyun #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #endif /* _ASM_ARCH_KW88F6281_H */ 24