1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2012 SAMSUNG Electronics 3*4882a593Smuzhiyun * Jaehoon Chung <jh80.chung@samsung.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define DWMCI_CLKSEL 0x09C 9*4882a593Smuzhiyun #define DWMCI_SET_SAMPLE_CLK(x) (x) 10*4882a593Smuzhiyun #define DWMCI_SET_DRV_CLK(x) ((x) << 16) 11*4882a593Smuzhiyun #define DWMCI_SET_DIV_RATIO(x) ((x) << 24) 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define EMMCP_MPSBEGIN0 0x1200 14*4882a593Smuzhiyun #define EMMCP_SEND0 0x1204 15*4882a593Smuzhiyun #define EMMCP_CTRL0 0x120C 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define MPSCTRL_SECURE_READ_BIT (0x1<<7) 18*4882a593Smuzhiyun #define MPSCTRL_SECURE_WRITE_BIT (0x1<<6) 19*4882a593Smuzhiyun #define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5) 20*4882a593Smuzhiyun #define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4) 21*4882a593Smuzhiyun #define MPSCTRL_USE_FUSE_KEY (0x1<<3) 22*4882a593Smuzhiyun #define MPSCTRL_ECB_MODE (0x1<<2) 23*4882a593Smuzhiyun #define MPSCTRL_ENCRYPTION (0x1<<1) 24*4882a593Smuzhiyun #define MPSCTRL_VALID (0x1<<0) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* CLKSEL Register */ 27*4882a593Smuzhiyun #define DWMCI_DIVRATIO_BIT 24 28*4882a593Smuzhiyun #define DWMCI_DIVRATIO_MASK 0x7 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun int exynos_dwmmc_init(const void *blob); 31