1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2010 Samsung Electronics 3*4882a593Smuzhiyun * Minkyu Kang <mk7.kang@samsung.com> 4*4882a593Smuzhiyun * MyungJoo Ham <myungjoo.ham@samsung.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __ASM_ARM_ARCH_ADC_H_ 10*4882a593Smuzhiyun #define __ASM_ARM_ARCH_ADC_H_ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define ADC_V2_CON1_SOFT_RESET (0x2 << 1) 13*4882a593Smuzhiyun #define ADC_V2_CON1_STC_EN 0x1 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define ADC_V2_CON2_OSEL(x) (((x) & 0x1) << 10) 16*4882a593Smuzhiyun #define OSEL_2S 0x0 17*4882a593Smuzhiyun #define OSEL_BINARY 0x1 18*4882a593Smuzhiyun #define ADC_V2_CON2_ESEL(x) (((x) & 0x1) << 9) 19*4882a593Smuzhiyun #define ESEL_ADC_EVAL_TIME_40CLK 0x0 20*4882a593Smuzhiyun #define ESEL_ADC_EVAL_TIME_20CLK 0x1 21*4882a593Smuzhiyun #define ADC_V2_CON2_HIGHF(x) (((x) & 0x1) << 8) 22*4882a593Smuzhiyun #define HIGHF_CONV_RATE_30KSPS 0x0 23*4882a593Smuzhiyun #define HIGHF_CONV_RATE_600KSPS 0x1 24*4882a593Smuzhiyun #define ADC_V2_CON2_C_TIME(x) (((x) & 0x7) << 4) 25*4882a593Smuzhiyun #define ADC_V2_CON2_CHAN_SEL_MASK 0xf 26*4882a593Smuzhiyun #define ADC_V2_CON2_CHAN_SEL(x) ((x) & ADC_V2_CON2_CHAN_SEL_MASK) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define ADC_V2_GET_STATUS_FLAG(x) (((x) >> 2) & 0x1) 29*4882a593Smuzhiyun #define FLAG_CONV_END 0x1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define ADC_V2_INT_DISABLE 0x0 32*4882a593Smuzhiyun #define ADC_V2_INT_ENABLE 0x1 33*4882a593Smuzhiyun #define INT_NOT_GENERATED 0x0 34*4882a593Smuzhiyun #define INT_GENERATED 0x1 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define ADC_V2_VERSION 0x80000008 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define ADC_V2_MAX_CHANNEL 9 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* For default 8 time convertion with sample rate 600 kSPS - 15us timeout */ 41*4882a593Smuzhiyun #define ADC_V2_CONV_TIMEOUT_US 15 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define ADC_V2_DAT_MASK 0xfff 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 46*4882a593Smuzhiyun struct s5p_adc { 47*4882a593Smuzhiyun unsigned int adccon; 48*4882a593Smuzhiyun unsigned int adctsc; 49*4882a593Smuzhiyun unsigned int adcdly; 50*4882a593Smuzhiyun unsigned int adcdat0; 51*4882a593Smuzhiyun unsigned int adcdat1; 52*4882a593Smuzhiyun unsigned int adcupdn; 53*4882a593Smuzhiyun unsigned int adcclrint; 54*4882a593Smuzhiyun unsigned int adcmux; 55*4882a593Smuzhiyun unsigned int adcclrintpndnup; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun struct exynos_adc_v2 { 59*4882a593Smuzhiyun unsigned int con1; 60*4882a593Smuzhiyun unsigned int con2; 61*4882a593Smuzhiyun unsigned int status; 62*4882a593Smuzhiyun unsigned int dat; 63*4882a593Smuzhiyun unsigned int int_en; 64*4882a593Smuzhiyun unsigned int int_status; 65*4882a593Smuzhiyun unsigned int reserved[2]; 66*4882a593Smuzhiyun unsigned int version; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun #endif 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #endif /* __ASM_ARM_ARCH_ADC_H_ */ 71