1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Pinmux configurations for the DAxxx SoCs 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2011 OMICRON electronics GmbH 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __ASM_ARCH_PINMUX_DEFS_H 10*4882a593Smuzhiyun #define __ASM_ARCH_PINMUX_DEFS_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/arch/davinci_misc.h> 13*4882a593Smuzhiyun #include <config.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* SPI0 pin muxer settings */ 16*4882a593Smuzhiyun extern const struct pinmux_config spi0_pins_base[3]; 17*4882a593Smuzhiyun extern const struct pinmux_config spi0_pins_scs0[1]; 18*4882a593Smuzhiyun extern const struct pinmux_config spi0_pins_ena[1]; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* SPI1 pin muxer settings */ 21*4882a593Smuzhiyun extern const struct pinmux_config spi1_pins_base[3]; 22*4882a593Smuzhiyun extern const struct pinmux_config spi1_pins_scs0[1]; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* UART pin muxer settings */ 25*4882a593Smuzhiyun extern const struct pinmux_config uart0_pins_txrx[2]; 26*4882a593Smuzhiyun extern const struct pinmux_config uart0_pins_rtscts[2]; 27*4882a593Smuzhiyun extern const struct pinmux_config uart1_pins_txrx[2]; 28*4882a593Smuzhiyun extern const struct pinmux_config uart2_pins_txrx[2]; 29*4882a593Smuzhiyun extern const struct pinmux_config uart2_pins_rtscts[2]; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* EMAC pin muxer settings*/ 32*4882a593Smuzhiyun extern const struct pinmux_config emac_pins_rmii[8]; 33*4882a593Smuzhiyun extern const struct pinmux_config emac_pins_rmii_clk_source[1]; 34*4882a593Smuzhiyun extern const struct pinmux_config emac_pins_mii[15]; 35*4882a593Smuzhiyun extern const struct pinmux_config emac_pins_mdio[2]; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* I2C pin muxer settings */ 38*4882a593Smuzhiyun extern const struct pinmux_config i2c0_pins[2]; 39*4882a593Smuzhiyun extern const struct pinmux_config i2c1_pins[2]; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* EMIFA pin muxer settings */ 42*4882a593Smuzhiyun extern const struct pinmux_config emifa_pins[40]; 43*4882a593Smuzhiyun extern const struct pinmux_config emifa_pins_cs0[1]; 44*4882a593Smuzhiyun extern const struct pinmux_config emifa_pins_cs2[1]; 45*4882a593Smuzhiyun extern const struct pinmux_config emifa_pins_cs3[1]; 46*4882a593Smuzhiyun extern const struct pinmux_config emifa_pins_cs4[1]; 47*4882a593Smuzhiyun extern const struct pinmux_config emifa_pins_nand[12]; 48*4882a593Smuzhiyun extern const struct pinmux_config emifa_pins_nor[43]; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* USB pin mux setting */ 51*4882a593Smuzhiyun extern const struct pinmux_config usb_pins[1]; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* MMC pin muxer settings */ 54*4882a593Smuzhiyun extern const struct pinmux_config mmc0_pins_8bit[10]; 55*4882a593Smuzhiyun extern const struct pinmux_config mmc0_pins[6]; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #endif 58