1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * LSI ET1011C PHY Driver for TI DaVinci(TMS320DM6467) board. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <common.h> 10*4882a593Smuzhiyun #include <net.h> 11*4882a593Smuzhiyun #include <miiphy.h> 12*4882a593Smuzhiyun #include <asm/arch/emac_defs.h> 13*4882a593Smuzhiyun #include "../../../drivers/net/davinci_emac.h" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifdef CONFIG_DRIVER_TI_EMAC 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifdef CONFIG_CMD_NET 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* LSI PHYSICAL LAYER TRANSCEIVER ET1011C */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define MII_PHY_CONFIG_REG 22 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* PHY Config bits */ 24*4882a593Smuzhiyun #define PHY_SYS_CLK_EN (1 << 4) 25*4882a593Smuzhiyun et1011c_get_link_speed(int phy_addr)26*4882a593Smuzhiyunint et1011c_get_link_speed(int phy_addr) 27*4882a593Smuzhiyun { 28*4882a593Smuzhiyun u_int16_t data; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) { 31*4882a593Smuzhiyun davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data); 32*4882a593Smuzhiyun /* Enable 125MHz clock sourced from PHY */ 33*4882a593Smuzhiyun davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG, 34*4882a593Smuzhiyun data | PHY_SYS_CLK_EN); 35*4882a593Smuzhiyun return (1); 36*4882a593Smuzhiyun } 37*4882a593Smuzhiyun return (0); 38*4882a593Smuzhiyun } 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #endif /* CONFIG_CMD_NET */ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #endif /* CONFIG_DRIVER_ETHER */ 43