1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 Atmel Corporation 3*4882a593Smuzhiyun * Bo Shen <voice.shen@atmel.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <common.h> 9*4882a593Smuzhiyun #include <asm/io.h> 10*4882a593Smuzhiyun #include <asm/arch/at91_common.h> 11*4882a593Smuzhiyun #include <asm/arch/at91_pit.h> 12*4882a593Smuzhiyun #include <asm/arch/at91_pmc.h> 13*4882a593Smuzhiyun #include <asm/arch/at91_rstc.h> 14*4882a593Smuzhiyun #include <asm/arch/at91_wdt.h> 15*4882a593Smuzhiyun #include <asm/arch/clk.h> 16*4882a593Smuzhiyun #include <spl.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR; 19*4882a593Smuzhiyun switch_to_main_crystal_osc(void)20*4882a593Smuzhiyunstatic void switch_to_main_crystal_osc(void) 21*4882a593Smuzhiyun { 22*4882a593Smuzhiyun struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; 23*4882a593Smuzhiyun u32 tmp; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun tmp = readl(&pmc->mor); 26*4882a593Smuzhiyun tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff); 27*4882a593Smuzhiyun tmp &= ~AT91_PMC_MOR_KEY(0xff); 28*4882a593Smuzhiyun tmp |= AT91_PMC_MOR_MOSCEN; 29*4882a593Smuzhiyun tmp |= AT91_PMC_MOR_OSCOUNT(8); 30*4882a593Smuzhiyun tmp |= AT91_PMC_MOR_KEY(0x37); 31*4882a593Smuzhiyun writel(tmp, &pmc->mor); 32*4882a593Smuzhiyun while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) 33*4882a593Smuzhiyun ; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun tmp = readl(&pmc->mor); 36*4882a593Smuzhiyun tmp &= ~AT91_PMC_MOR_OSCBYPASS; 37*4882a593Smuzhiyun tmp &= ~AT91_PMC_MOR_KEY(0xff); 38*4882a593Smuzhiyun tmp |= AT91_PMC_MOR_KEY(0x37); 39*4882a593Smuzhiyun writel(tmp, &pmc->mor); 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun tmp = readl(&pmc->mor); 42*4882a593Smuzhiyun tmp |= AT91_PMC_MOR_MOSCSEL; 43*4882a593Smuzhiyun tmp &= ~AT91_PMC_MOR_KEY(0xff); 44*4882a593Smuzhiyun tmp |= AT91_PMC_MOR_KEY(0x37); 45*4882a593Smuzhiyun writel(tmp, &pmc->mor); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS)) 48*4882a593Smuzhiyun ; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* Wait until MAINRDY field is set to make sure main clock is stable */ 51*4882a593Smuzhiyun while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY)) 52*4882a593Smuzhiyun ; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #ifndef CONFIG_SAMA5D4 55*4882a593Smuzhiyun tmp = readl(&pmc->mor); 56*4882a593Smuzhiyun tmp &= ~AT91_PMC_MOR_MOSCRCEN; 57*4882a593Smuzhiyun tmp &= ~AT91_PMC_MOR_KEY(0xff); 58*4882a593Smuzhiyun tmp |= AT91_PMC_MOR_KEY(0x37); 59*4882a593Smuzhiyun writel(tmp, &pmc->mor); 60*4882a593Smuzhiyun #endif 61*4882a593Smuzhiyun } 62*4882a593Smuzhiyun matrix_init(void)63*4882a593Smuzhiyun__weak void matrix_init(void) 64*4882a593Smuzhiyun { 65*4882a593Smuzhiyun /* This only be used for sama5d4 soc now */ 66*4882a593Smuzhiyun } 67*4882a593Smuzhiyun redirect_int_from_saic_to_aic(void)68*4882a593Smuzhiyun__weak void redirect_int_from_saic_to_aic(void) 69*4882a593Smuzhiyun { 70*4882a593Smuzhiyun /* This only be used for sama5d4 soc now */ 71*4882a593Smuzhiyun } 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* empty stub to satisfy current lowlevel_init, can be removed any time */ s_init(void)74*4882a593Smuzhiyunvoid s_init(void) 75*4882a593Smuzhiyun { 76*4882a593Smuzhiyun } 77*4882a593Smuzhiyun board_init_f(ulong dummy)78*4882a593Smuzhiyunvoid board_init_f(ulong dummy) 79*4882a593Smuzhiyun { 80*4882a593Smuzhiyun int ret; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun switch_to_main_crystal_osc(); 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #ifdef CONFIG_SAMA5D2 85*4882a593Smuzhiyun configure_2nd_sram_as_l2_cache(); 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* disable watchdog */ 89*4882a593Smuzhiyun at91_disable_wdt(); 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* PMC configuration */ 92*4882a593Smuzhiyun at91_pmc_init(); 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun matrix_init(); 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun redirect_int_from_saic_to_aic(); 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun timer_init(); 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun board_early_init_f(); 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun mem_init(); 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun ret = spl_init(); 107*4882a593Smuzhiyun if (ret) { 108*4882a593Smuzhiyun debug("spl_init() failed: %d\n", ret); 109*4882a593Smuzhiyun hang(); 110*4882a593Smuzhiyun } 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun preloader_console_init(); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun } 115