1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Boot mode definitions for the SAMA5Dx SoC 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2016 Marek Vasut <marex@denx.de> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __SAMA5_BOOT_H 10*4882a593Smuzhiyun #define __SAMA5_BOOT_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* Boot modes stored by BootROM in r4 */ 13*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_OFF 0 14*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_MASK 0xf 15*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_SPI (0 << 0) 16*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_MCI (1 << 0) 17*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_SMC (2 << 0) 18*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_TWI (3 << 0) 19*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_QSPI (4 << 0) 20*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_FROM_SAMBA (7 << 0) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_DEV_ID_OFF 4 23*4882a593Smuzhiyun #define ATMEL_SAMA5_BOOT_DEV_ID_MASK 0xf 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif /* __SAMA5_BOOT_H */ 26