1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Google, Inc 3*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef AT91_SCK_H 9*4882a593Smuzhiyun #define AT91_SCK_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * SCKCR flags 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun #define AT91SAM9G45_SCKCR_RCEN (1 << 0) /* RC Oscillator Enable */ 15*4882a593Smuzhiyun #define AT91SAM9G45_SCKCR_OSC32EN (1 << 1) /* 32kHz Oscillator Enable */ 16*4882a593Smuzhiyun #define AT91SAM9G45_SCKCR_OSC32BYP (1 << 2) /* 32kHz Oscillator Bypass */ 17*4882a593Smuzhiyun #define AT91SAM9G45_SCKCR_OSCSEL (1 << 3) /* Slow Clock Selector */ 18*4882a593Smuzhiyun #define AT91SAM9G45_SCKCR_OSCSEL_RC (0 << 3) 19*4882a593Smuzhiyun #define AT91SAM9G45_SCKCR_OSCSEL_32 (1 << 3) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #endif 22