1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * [partely copied from arch/arm/cpu/arm926ejs/at91/arm9260_devices.c]
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) Copyright 2011
5*4882a593Smuzhiyun * Andreas Bießmann <andreas@biessmann.org>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * (C) Copyright 2007-2008
8*4882a593Smuzhiyun * Stelian Pop <stelian@popies.net>
9*4882a593Smuzhiyun * Lead Tech Design <www.leadtechdesign.com>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <common.h>
15*4882a593Smuzhiyun #include <asm/io.h>
16*4882a593Smuzhiyun #include <asm/arch/at91_common.h>
17*4882a593Smuzhiyun #include <asm/arch/clk.h>
18*4882a593Smuzhiyun #include <asm/arch/gpio.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
22*4882a593Smuzhiyun * peripheral pins. Good to have if hardware is soldered optionally
23*4882a593Smuzhiyun * or in case of SPI no slave is selected. Avoid lines to float
24*4882a593Smuzhiyun * needlessly. Use a short local PUP define.
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * Due to errata "TXD floats when CTS is inactive" pullups are always
27*4882a593Smuzhiyun * on for TXD pins.
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun #ifdef CONFIG_AT91_GPIO_PULLUP
30*4882a593Smuzhiyun # define PUP CONFIG_AT91_GPIO_PULLUP
31*4882a593Smuzhiyun #else
32*4882a593Smuzhiyun # define PUP 0
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun
at91_serial0_hw_init(void)35*4882a593Smuzhiyun void at91_serial0_hw_init(void)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTA, 17, 1); /* TXD0 */
38*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTA, 18, PUP); /* RXD0 */
39*4882a593Smuzhiyun at91_periph_clk_enable(ATMEL_ID_USART0);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
at91_serial1_hw_init(void)42*4882a593Smuzhiyun void at91_serial1_hw_init(void)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTB, 20, PUP); /* RXD1 */
45*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTB, 21, 1); /* TXD1 */
46*4882a593Smuzhiyun at91_periph_clk_enable(ATMEL_ID_USART1);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
at91_serial2_hw_init(void)49*4882a593Smuzhiyun void at91_serial2_hw_init(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTA, 22, PUP); /* RXD2 */
52*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTA, 23, 1); /* TXD2 */
53*4882a593Smuzhiyun at91_periph_clk_enable(ATMEL_ID_USART2);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
at91_seriald_hw_init(void)56*4882a593Smuzhiyun void at91_seriald_hw_init(void)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTA, 30, PUP); /* DRXD */
59*4882a593Smuzhiyun at91_set_a_periph(AT91_PIO_PORTA, 31, 1); /* DTXD */
60*4882a593Smuzhiyun /* writing SYS to PCER has no effect on AT91RM9200 */
61*4882a593Smuzhiyun }
62