1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2015
3*4882a593Smuzhiyun * Kamil Lulko, <kamil.lulko@gmail.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun * Upon exception entry ARMv7-M processors automatically save stack
12*4882a593Smuzhiyun * frames containing some registers. For simplicity initial
13*4882a593Smuzhiyun * implementation uses only this auto-saved stack frame.
14*4882a593Smuzhiyun * This does not contain complete register set dump,
15*4882a593Smuzhiyun * only R0-R3, R12, LR, PC and xPSR are saved.
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun struct autosave_regs {
19*4882a593Smuzhiyun long uregs[8];
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define ARM_XPSR uregs[7]
23*4882a593Smuzhiyun #define ARM_PC uregs[6]
24*4882a593Smuzhiyun #define ARM_LR uregs[5]
25*4882a593Smuzhiyun #define ARM_R12 uregs[4]
26*4882a593Smuzhiyun #define ARM_R3 uregs[3]
27*4882a593Smuzhiyun #define ARM_R2 uregs[2]
28*4882a593Smuzhiyun #define ARM_R1 uregs[1]
29*4882a593Smuzhiyun #define ARM_R0 uregs[0]
30*4882a593Smuzhiyun
interrupt_init(void)31*4882a593Smuzhiyun int interrupt_init(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun return 0;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
enable_interrupts(void)36*4882a593Smuzhiyun void enable_interrupts(void)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun return;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
disable_interrupts(void)41*4882a593Smuzhiyun int disable_interrupts(void)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun return 0;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
dump_regs(struct autosave_regs * regs)46*4882a593Smuzhiyun void dump_regs(struct autosave_regs *regs)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun printf("pc : %08lx lr : %08lx xPSR : %08lx\n",
49*4882a593Smuzhiyun regs->ARM_PC, regs->ARM_LR, regs->ARM_XPSR);
50*4882a593Smuzhiyun printf("r12 : %08lx r3 : %08lx r2 : %08lx\n"
51*4882a593Smuzhiyun "r1 : %08lx r0 : %08lx\n",
52*4882a593Smuzhiyun regs->ARM_R12, regs->ARM_R3, regs->ARM_R2,
53*4882a593Smuzhiyun regs->ARM_R1, regs->ARM_R0);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
bad_mode(void)56*4882a593Smuzhiyun void bad_mode(void)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun panic("Resetting CPU ...\n");
59*4882a593Smuzhiyun reset_cpu(0);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
do_hard_fault(struct autosave_regs * autosave_regs)62*4882a593Smuzhiyun void do_hard_fault(struct autosave_regs *autosave_regs)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun printf("Hard fault\n");
65*4882a593Smuzhiyun dump_regs(autosave_regs);
66*4882a593Smuzhiyun bad_mode();
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
do_mm_fault(struct autosave_regs * autosave_regs)69*4882a593Smuzhiyun void do_mm_fault(struct autosave_regs *autosave_regs)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun printf("Memory management fault\n");
72*4882a593Smuzhiyun dump_regs(autosave_regs);
73*4882a593Smuzhiyun bad_mode();
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
do_bus_fault(struct autosave_regs * autosave_regs)76*4882a593Smuzhiyun void do_bus_fault(struct autosave_regs *autosave_regs)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun printf("Bus fault\n");
79*4882a593Smuzhiyun dump_regs(autosave_regs);
80*4882a593Smuzhiyun bad_mode();
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
do_usage_fault(struct autosave_regs * autosave_regs)83*4882a593Smuzhiyun void do_usage_fault(struct autosave_regs *autosave_regs)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun printf("Usage fault\n");
86*4882a593Smuzhiyun dump_regs(autosave_regs);
87*4882a593Smuzhiyun bad_mode();
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
do_invalid_entry(struct autosave_regs * autosave_regs)90*4882a593Smuzhiyun void do_invalid_entry(struct autosave_regs *autosave_regs)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun printf("Exception\n");
93*4882a593Smuzhiyun dump_regs(autosave_regs);
94*4882a593Smuzhiyun bad_mode();
95*4882a593Smuzhiyun }
96