1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * arch/arm/include/debug/8250.S 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 1994-2013 Russell King 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun#include <linux/serial_reg.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun .macro addruart, rp, rv, tmp 11*4882a593Smuzhiyun ldr \rp, =CONFIG_DEBUG_UART_PHYS 12*4882a593Smuzhiyun ldr \rv, =CONFIG_DEBUG_UART_VIRT 13*4882a593Smuzhiyun .endm 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun#ifdef CONFIG_DEBUG_UART_8250_WORD 16*4882a593Smuzhiyun .macro store, rd, rx:vararg 17*4882a593Smuzhiyun str \rd, \rx 18*4882a593Smuzhiyun .endm 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun .macro load, rd, rx:vararg 21*4882a593Smuzhiyun ldr \rd, \rx 22*4882a593Smuzhiyun .endm 23*4882a593Smuzhiyun#else 24*4882a593Smuzhiyun .macro store, rd, rx:vararg 25*4882a593Smuzhiyun strb \rd, \rx 26*4882a593Smuzhiyun .endm 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun .macro load, rd, rx:vararg 29*4882a593Smuzhiyun ldrb \rd, \rx 30*4882a593Smuzhiyun .endm 31*4882a593Smuzhiyun#endif 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun .macro senduart,rd,rx 36*4882a593Smuzhiyun store \rd, [\rx, #UART_TX << UART_SHIFT] 37*4882a593Smuzhiyun .endm 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun .macro busyuart,rd,rx 40*4882a593Smuzhiyun1002: load \rd, [\rx, #UART_LSR << UART_SHIFT] 41*4882a593Smuzhiyun and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE 42*4882a593Smuzhiyun teq \rd, #UART_LSR_TEMT | UART_LSR_THRE 43*4882a593Smuzhiyun bne 1002b 44*4882a593Smuzhiyun .endm 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun .macro waituart,rd,rx 47*4882a593Smuzhiyun#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL 48*4882a593Smuzhiyun1001: load \rd, [\rx, #UART_MSR << UART_SHIFT] 49*4882a593Smuzhiyun tst \rd, #UART_MSR_CTS 50*4882a593Smuzhiyun beq 1001b 51*4882a593Smuzhiyun#endif 52*4882a593Smuzhiyun .endm 53