xref: /OK3568_Linux_fs/u-boot/arch/arm/include/asm/ti-common/omap_wdt.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * omap_wdt.h
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * OMAP Watchdog header file
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef __OMAP_WDT_H__
12*4882a593Smuzhiyun #define __OMAP_WDT_H__
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun  * Watchdog:
16*4882a593Smuzhiyun  * Using the prescaler, the OMAP watchdog could go for many
17*4882a593Smuzhiyun  * months before firing.  These limits work without scaling,
18*4882a593Smuzhiyun  * with the 60 second default assumed by most tools and docs.
19*4882a593Smuzhiyun  */
20*4882a593Smuzhiyun #define TIMER_MARGIN_MAX	(24 * 60 * 60)	/* 1 day */
21*4882a593Smuzhiyun #define TIMER_MARGIN_DEFAULT	60	/* 60 secs */
22*4882a593Smuzhiyun #define TIMER_MARGIN_MIN	1
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define PTV			0	/* prescale */
25*4882a593Smuzhiyun #define GET_WLDR_VAL(secs)	(0xffffffff - ((secs) * (32768/(1<<PTV))) + 1)
26*4882a593Smuzhiyun #define WDT_WWPS_PEND_WCLR	BIT(0)
27*4882a593Smuzhiyun #define WDT_WWPS_PEND_WLDR	BIT(2)
28*4882a593Smuzhiyun #define WDT_WWPS_PEND_WTGR	BIT(3)
29*4882a593Smuzhiyun #define WDT_WWPS_PEND_WSPR	BIT(4)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define WDT_WCLR_PRE		BIT(5)
32*4882a593Smuzhiyun #define WDT_WCLR_PTV_OFF	2
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* Watchdog timer registers */
35*4882a593Smuzhiyun struct wd_timer {
36*4882a593Smuzhiyun 	unsigned int resv1[4];
37*4882a593Smuzhiyun 	unsigned int wdtwdsc;	/* offset 0x010 */
38*4882a593Smuzhiyun 	unsigned int wdtwdst;	/* offset 0x014 */
39*4882a593Smuzhiyun 	unsigned int wdtwisr;	/* offset 0x018 */
40*4882a593Smuzhiyun 	unsigned int wdtwier;	/* offset 0x01C */
41*4882a593Smuzhiyun 	unsigned int wdtwwer;	/* offset 0x020 */
42*4882a593Smuzhiyun 	unsigned int wdtwclr;	/* offset 0x024 */
43*4882a593Smuzhiyun 	unsigned int wdtwcrr;	/* offset 0x028 */
44*4882a593Smuzhiyun 	unsigned int wdtwldr;	/* offset 0x02C */
45*4882a593Smuzhiyun 	unsigned int wdtwtgr;	/* offset 0x030 */
46*4882a593Smuzhiyun 	unsigned int wdtwwps;	/* offset 0x034 */
47*4882a593Smuzhiyun 	unsigned int resv2[3];
48*4882a593Smuzhiyun 	unsigned int wdtwdly;	/* offset 0x044 */
49*4882a593Smuzhiyun 	unsigned int wdtwspr;	/* offset 0x048 */
50*4882a593Smuzhiyun 	unsigned int resv3[1];
51*4882a593Smuzhiyun 	unsigned int wdtwqeoi;	/* offset 0x050 */
52*4882a593Smuzhiyun 	unsigned int wdtwqstar;	/* offset 0x054 */
53*4882a593Smuzhiyun 	unsigned int wdtwqsta;	/* offset 0x058 */
54*4882a593Smuzhiyun 	unsigned int wdtwqens;	/* offset 0x05C */
55*4882a593Smuzhiyun 	unsigned int wdtwqenc;	/* offset 0x060 */
56*4882a593Smuzhiyun 	unsigned int resv4[39];
57*4882a593Smuzhiyun 	unsigned int wdt_unfr;	/* offset 0x100 */
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #endif /* __OMAP_WDT_H__ */
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