1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 - ARM Ltd 3*4882a593Smuzhiyun * Author: Marc Zyngier <marc.zyngier@arm.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 6*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 10*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*4882a593Smuzhiyun * GNU General Public License for more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License 15*4882a593Smuzhiyun * along with this program. If not, see <http://www.gnu.org/licenses/>. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifndef __ARM_PSCI_H__ 19*4882a593Smuzhiyun #define __ARM_PSCI_H__ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define ARM_PSCI_VER_1_0 (0x00010000) 22*4882a593Smuzhiyun #define ARM_PSCI_VER_0_2 (0x00000002) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* PSCI 0.1 interface */ 25*4882a593Smuzhiyun #define ARM_PSCI_FN_BASE 0x95c1ba5e 26*4882a593Smuzhiyun #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n)) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define ARM_PSCI_FN_CPU_SUSPEND ARM_PSCI_FN(0) 29*4882a593Smuzhiyun #define ARM_PSCI_FN_CPU_OFF ARM_PSCI_FN(1) 30*4882a593Smuzhiyun #define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(2) 31*4882a593Smuzhiyun #define ARM_PSCI_FN_MIGRATE ARM_PSCI_FN(3) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define ARM_PSCI_RET_SUCCESS 0 34*4882a593Smuzhiyun #define ARM_PSCI_RET_NI (-1) 35*4882a593Smuzhiyun #define ARM_PSCI_RET_INVAL (-2) 36*4882a593Smuzhiyun #define ARM_PSCI_RET_DENIED (-3) 37*4882a593Smuzhiyun #define ARM_PSCI_RET_ALREADY_ON (-4) 38*4882a593Smuzhiyun #define ARM_PSCI_RET_ON_PENDING (-5) 39*4882a593Smuzhiyun #define ARM_PSCI_RET_INTERNAL_FAILURE (-6) 40*4882a593Smuzhiyun #define ARM_PSCI_RET_NOT_PRESENT (-7) 41*4882a593Smuzhiyun #define ARM_PSCI_RET_DISABLED (-8) 42*4882a593Smuzhiyun #define ARM_PSCI_RET_INVALID_ADDRESS (-9) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* PSCI 0.2 interface */ 45*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_BASE 0x84000000 46*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n)) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN64_BASE 0xC4000000 49*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN64(n) (ARM_PSCI_0_2_FN64_BASE + (n)) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_PSCI_VERSION ARM_PSCI_0_2_FN(0) 52*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_CPU_SUSPEND ARM_PSCI_0_2_FN(1) 53*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_CPU_OFF ARM_PSCI_0_2_FN(2) 54*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3) 55*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_AFFINITY_INFO ARM_PSCI_0_2_FN(4) 56*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_MIGRATE ARM_PSCI_0_2_FN(5) 57*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE ARM_PSCI_0_2_FN(6) 58*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN(7) 59*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8) 60*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN_SYSTEM_RESET ARM_PSCI_0_2_FN(9) 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN64_CPU_SUSPEND ARM_PSCI_0_2_FN64(1) 63*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN64_CPU_ON ARM_PSCI_0_2_FN64(3) 64*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4) 65*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5) 66*4882a593Smuzhiyun #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* PSCI 1.0 interface */ 69*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10) 70*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_CPU_FREEZE ARM_PSCI_0_2_FN(11) 71*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN(12) 72*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_NODE_HW_STATE ARM_PSCI_0_2_FN(13) 73*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND ARM_PSCI_0_2_FN(14) 74*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE ARM_PSCI_0_2_FN(15) 75*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_STAT_RESIDENCY ARM_PSCI_0_2_FN(16) 76*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN_STAT_COUNT ARM_PSCI_0_2_FN(17) 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN64(12) 79*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN64_NODE_HW_STATE ARM_PSCI_0_2_FN64(13) 80*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND ARM_PSCI_0_2_FN64(14) 81*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16) 82*4882a593Smuzhiyun #define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17) 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* 1KB stack per core */ 85*4882a593Smuzhiyun #define ARM_PSCI_STACK_SHIFT 10 86*4882a593Smuzhiyun #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* PSCI affinity level state returned by AFFINITY_INFO */ 89*4882a593Smuzhiyun #define PSCI_AFFINITY_LEVEL_ON 0 90*4882a593Smuzhiyun #define PSCI_AFFINITY_LEVEL_OFF 1 91*4882a593Smuzhiyun #define PSCI_AFFINITY_LEVEL_ON_PENDING 2 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 94*4882a593Smuzhiyun #include <asm/types.h> 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /* These 2 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */ 97*4882a593Smuzhiyun u32 psci_get_target_pc(int cpu); 98*4882a593Smuzhiyun void psci_save_target_pc(int cpu, u32 pc); 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun void psci_cpu_entry(void); 101*4882a593Smuzhiyun u32 psci_get_cpu_id(void); 102*4882a593Smuzhiyun void psci_cpu_off_common(void); 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun int psci_update_dt(void *fdt); 105*4882a593Smuzhiyun void psci_board_init(void); 106*4882a593Smuzhiyun int fdt_psci(void *fdt); 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun void psci_v7_flush_dcache_all(void); 109*4882a593Smuzhiyun #endif /* ! __ASSEMBLY__ */ 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #endif /* __ARM_PSCI_H__ */ 112