1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2014 - 2015 Xilinx, Inc. 3*4882a593Smuzhiyun * Michal Simek <michal.simek@xilinx.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _ASM_ARCH_CLK_H_ 9*4882a593Smuzhiyun #define _ASM_ARCH_CLK_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun unsigned long zynqmp_get_system_timer_freq(void); 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #endif /* _ASM_ARCH_CLK_H_ */ 14