1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* Tegra30 high-level function multiplexing */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _TEGRA30_FUNCMUX_H_ 10*4882a593Smuzhiyun #define _TEGRA30_FUNCMUX_H_ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/arch-tegra/funcmux.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* Configs supported by the func mux */ 15*4882a593Smuzhiyun enum { 16*4882a593Smuzhiyun FUNCMUX_DEFAULT = 0, /* default config */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* UART configs */ 19*4882a593Smuzhiyun FUNCMUX_UART1_ULPI = 0, 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun #endif /* _TEGRA30_FUNCMUX_H_ */ 22