1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2010 3*4882a593Smuzhiyun * NVIDIA Corporation <www.nvidia.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __ASM_ARCH_TEGRA_DISPLAY_H 9*4882a593Smuzhiyun #define __ASM_ARCH_TEGRA_DISPLAY_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /** 12*4882a593Smuzhiyun * Register a new display based on device tree configuration. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * The frame buffer can be positioned by U-Boot or overridden by the fdt. 15*4882a593Smuzhiyun * You should pass in the U-Boot address here, and check the contents of 16*4882a593Smuzhiyun * struct fdt_disp_config to see what was actually chosen. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * @param blob Device tree blob 19*4882a593Smuzhiyun * @param default_lcd_base Default address of LCD frame buffer 20*4882a593Smuzhiyun * @return 0 if ok, -1 on error (unsupported bits per pixel) 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun int tegra_display_probe(const void *blob, void *default_lcd_base); 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /** 25*4882a593Smuzhiyun * Return the current display configuration 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * @return pointer to display configuration, or NULL if there is no valid 28*4882a593Smuzhiyun * config 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun struct fdt_disp_config *tegra_display_get_config(void); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /** 33*4882a593Smuzhiyun * Perform the next stage of the LCD init if it is time to do so. 34*4882a593Smuzhiyun * 35*4882a593Smuzhiyun * LCD init can be time-consuming because of the number of delays we need 36*4882a593Smuzhiyun * while waiting for the backlight power supply, etc. This function can 37*4882a593Smuzhiyun * be called at various times during U-Boot operation to advance the 38*4882a593Smuzhiyun * initialization of the LCD to the next stage if sufficient time has 39*4882a593Smuzhiyun * passed since the last stage. It keeps track of what stage it is up to 40*4882a593Smuzhiyun * and the time that it is permitted to move to the next stage. 41*4882a593Smuzhiyun * 42*4882a593Smuzhiyun * The final call should have wait=1 to complete the init. 43*4882a593Smuzhiyun * 44*4882a593Smuzhiyun * @param blob fdt blob containing LCD information 45*4882a593Smuzhiyun * @param wait 1 to wait until all init is complete, and then return 46*4882a593Smuzhiyun * 0 to return immediately, potentially doing nothing if it is 47*4882a593Smuzhiyun * not yet time for the next init. 48*4882a593Smuzhiyun */ 49*4882a593Smuzhiyun int tegra_lcd_check_next_stage(const void *blob, int wait); 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /** 52*4882a593Smuzhiyun * Set up the maximum LCD size so we can size the frame buffer. 53*4882a593Smuzhiyun * 54*4882a593Smuzhiyun * @param blob fdt blob containing LCD information 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun void tegra_lcd_early_init(const void *blob); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/ 59