1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2010,2011 3*4882a593Smuzhiyun * NVIDIA Corporation <www.nvidia.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _FUSE_H_ 9*4882a593Smuzhiyun #define _FUSE_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* FUSE registers */ 12*4882a593Smuzhiyun struct fuse_regs { 13*4882a593Smuzhiyun u32 reserved0[64]; /* 0x00 - 0xFC: */ 14*4882a593Smuzhiyun u32 production_mode; /* 0x100: FUSE_PRODUCTION_MODE */ 15*4882a593Smuzhiyun u32 reserved1[3]; /* 0x104 - 0x10c: */ 16*4882a593Smuzhiyun u32 sku_info; /* 0x110 */ 17*4882a593Smuzhiyun u32 reserved2[13]; /* 0x114 - 0x144: */ 18*4882a593Smuzhiyun u32 fa; /* 0x148: FUSE_FA */ 19*4882a593Smuzhiyun u32 reserved3[21]; /* 0x14C - 0x19C: */ 20*4882a593Smuzhiyun u32 security_mode; /* 0x1A0: FUSE_SECURITY_MODE */ 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #endif /* ifndef _FUSE_H_ */ 24