1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2014 3*4882a593Smuzhiyun * Chen-Yu Tsai <wens@csie.org> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Watchdog register definitions 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _SUNXI_WATCHDOG_H_ 11*4882a593Smuzhiyun #define _SUNXI_WATCHDOG_H_ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define WDT_CTRL_RESTART (0x1 << 0) 14*4882a593Smuzhiyun #define WDT_CTRL_KEY (0x0a57 << 1) 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #if defined(CONFIG_MACH_SUN4I) || \ 17*4882a593Smuzhiyun defined(CONFIG_MACH_SUN5I) || \ 18*4882a593Smuzhiyun defined(CONFIG_MACH_SUN7I) || \ 19*4882a593Smuzhiyun defined(CONFIG_MACH_SUN8I_R40) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define WDT_MODE_EN (0x1 << 0) 22*4882a593Smuzhiyun #define WDT_MODE_RESET_EN (0x1 << 1) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun struct sunxi_wdog { 25*4882a593Smuzhiyun u32 ctl; /* 0x00 */ 26*4882a593Smuzhiyun u32 mode; /* 0x04 */ 27*4882a593Smuzhiyun u32 res[2]; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #else 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define WDT_CFG_RESET (0x1) 33*4882a593Smuzhiyun #define WDT_MODE_EN (0x1) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct sunxi_wdog { 36*4882a593Smuzhiyun u32 irq_en; /* 0x00 */ 37*4882a593Smuzhiyun u32 irq_sta; /* 0x04 */ 38*4882a593Smuzhiyun u32 res1[2]; 39*4882a593Smuzhiyun u32 ctl; /* 0x10 */ 40*4882a593Smuzhiyun u32 cfg; /* 0x14 */ 41*4882a593Smuzhiyun u32 mode; /* 0x18 */ 42*4882a593Smuzhiyun u32 res2; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #endif 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif /* _SUNXI_WATCHDOG_H_ */ 48