1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2014 3*4882a593Smuzhiyun * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _STV0991_WD_RST_H 9*4882a593Smuzhiyun #define _STV0991_WD_RST_H 10*4882a593Smuzhiyun #include <asm/arch-stv0991/hardware.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun struct stv0991_wd_ru { 13*4882a593Smuzhiyun u32 wdru_config; 14*4882a593Smuzhiyun u32 wdru_ctrl1; 15*4882a593Smuzhiyun u32 wdru_ctrl2; 16*4882a593Smuzhiyun u32 wdru_tim; 17*4882a593Smuzhiyun u32 wdru_count; 18*4882a593Smuzhiyun u32 wdru_stat; 19*4882a593Smuzhiyun u32 wdru_wrlock; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun struct stv0991_wd_ru *const stv0991_wd_ru_ptr = \ 23*4882a593Smuzhiyun (struct stv0991_wd_ru *)WDRU_BASE_ADDR; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* Watchdog control register */ 26*4882a593Smuzhiyun #define WDRU_RST_SYS 0x1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #endif 29