1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2011
3*4882a593Smuzhiyun * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2015
6*4882a593Smuzhiyun * Kamil Lulko, <kamil.lulko@gmail.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #ifndef _STM32_GPIO_H_
12*4882a593Smuzhiyun #define _STM32_GPIO_H_
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #if (CONFIG_STM32_USART == 1)
15*4882a593Smuzhiyun #define STM32_GPIO_PORT_X STM32_GPIO_PORT_A
16*4882a593Smuzhiyun #define STM32_GPIO_PIN_TX STM32_GPIO_PIN_9
17*4882a593Smuzhiyun #define STM32_GPIO_PIN_RX STM32_GPIO_PIN_10
18*4882a593Smuzhiyun #define STM32_GPIO_USART STM32_GPIO_AF7
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #elif (CONFIG_STM32_USART == 2)
21*4882a593Smuzhiyun #define STM32_GPIO_PORT_X STM32_GPIO_PORT_D
22*4882a593Smuzhiyun #define STM32_GPIO_PIN_TX STM32_GPIO_PIN_5
23*4882a593Smuzhiyun #define STM32_GPIO_PIN_RX STM32_GPIO_PIN_6
24*4882a593Smuzhiyun #define STM32_GPIO_USART STM32_GPIO_AF7
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #elif (CONFIG_STM32_USART == 3)
27*4882a593Smuzhiyun #define STM32_GPIO_PORT_X STM32_GPIO_PORT_C
28*4882a593Smuzhiyun #define STM32_GPIO_PIN_TX STM32_GPIO_PIN_10
29*4882a593Smuzhiyun #define STM32_GPIO_PIN_RX STM32_GPIO_PIN_11
30*4882a593Smuzhiyun #define STM32_GPIO_USART STM32_GPIO_AF7
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #elif (CONFIG_STM32_USART == 6)
33*4882a593Smuzhiyun #define STM32_GPIO_PORT_X STM32_GPIO_PORT_G
34*4882a593Smuzhiyun #define STM32_GPIO_PIN_TX STM32_GPIO_PIN_14
35*4882a593Smuzhiyun #define STM32_GPIO_PIN_RX STM32_GPIO_PIN_9
36*4882a593Smuzhiyun #define STM32_GPIO_USART STM32_GPIO_AF8
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #else
39*4882a593Smuzhiyun #define STM32_GPIO_PORT_X STM32_GPIO_PORT_A
40*4882a593Smuzhiyun #define STM32_GPIO_PIN_TX STM32_GPIO_PIN_9
41*4882a593Smuzhiyun #define STM32_GPIO_PIN_RX STM32_GPIO_PIN_10
42*4882a593Smuzhiyun #define STM32_GPIO_USART STM32_GPIO_AF7
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #endif
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun enum stm32_gpio_port {
47*4882a593Smuzhiyun STM32_GPIO_PORT_A = 0,
48*4882a593Smuzhiyun STM32_GPIO_PORT_B,
49*4882a593Smuzhiyun STM32_GPIO_PORT_C,
50*4882a593Smuzhiyun STM32_GPIO_PORT_D,
51*4882a593Smuzhiyun STM32_GPIO_PORT_E,
52*4882a593Smuzhiyun STM32_GPIO_PORT_F,
53*4882a593Smuzhiyun STM32_GPIO_PORT_G,
54*4882a593Smuzhiyun STM32_GPIO_PORT_H,
55*4882a593Smuzhiyun STM32_GPIO_PORT_I
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun enum stm32_gpio_pin {
59*4882a593Smuzhiyun STM32_GPIO_PIN_0 = 0,
60*4882a593Smuzhiyun STM32_GPIO_PIN_1,
61*4882a593Smuzhiyun STM32_GPIO_PIN_2,
62*4882a593Smuzhiyun STM32_GPIO_PIN_3,
63*4882a593Smuzhiyun STM32_GPIO_PIN_4,
64*4882a593Smuzhiyun STM32_GPIO_PIN_5,
65*4882a593Smuzhiyun STM32_GPIO_PIN_6,
66*4882a593Smuzhiyun STM32_GPIO_PIN_7,
67*4882a593Smuzhiyun STM32_GPIO_PIN_8,
68*4882a593Smuzhiyun STM32_GPIO_PIN_9,
69*4882a593Smuzhiyun STM32_GPIO_PIN_10,
70*4882a593Smuzhiyun STM32_GPIO_PIN_11,
71*4882a593Smuzhiyun STM32_GPIO_PIN_12,
72*4882a593Smuzhiyun STM32_GPIO_PIN_13,
73*4882a593Smuzhiyun STM32_GPIO_PIN_14,
74*4882a593Smuzhiyun STM32_GPIO_PIN_15
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun enum stm32_gpio_mode {
78*4882a593Smuzhiyun STM32_GPIO_MODE_IN = 0,
79*4882a593Smuzhiyun STM32_GPIO_MODE_OUT,
80*4882a593Smuzhiyun STM32_GPIO_MODE_AF,
81*4882a593Smuzhiyun STM32_GPIO_MODE_AN
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun enum stm32_gpio_otype {
85*4882a593Smuzhiyun STM32_GPIO_OTYPE_PP = 0,
86*4882a593Smuzhiyun STM32_GPIO_OTYPE_OD
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun enum stm32_gpio_speed {
90*4882a593Smuzhiyun STM32_GPIO_SPEED_2M = 0,
91*4882a593Smuzhiyun STM32_GPIO_SPEED_25M,
92*4882a593Smuzhiyun STM32_GPIO_SPEED_50M,
93*4882a593Smuzhiyun STM32_GPIO_SPEED_100M
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun enum stm32_gpio_pupd {
97*4882a593Smuzhiyun STM32_GPIO_PUPD_NO = 0,
98*4882a593Smuzhiyun STM32_GPIO_PUPD_UP,
99*4882a593Smuzhiyun STM32_GPIO_PUPD_DOWN
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun enum stm32_gpio_af {
103*4882a593Smuzhiyun STM32_GPIO_AF0 = 0,
104*4882a593Smuzhiyun STM32_GPIO_AF1,
105*4882a593Smuzhiyun STM32_GPIO_AF2,
106*4882a593Smuzhiyun STM32_GPIO_AF3,
107*4882a593Smuzhiyun STM32_GPIO_AF4,
108*4882a593Smuzhiyun STM32_GPIO_AF5,
109*4882a593Smuzhiyun STM32_GPIO_AF6,
110*4882a593Smuzhiyun STM32_GPIO_AF7,
111*4882a593Smuzhiyun STM32_GPIO_AF8,
112*4882a593Smuzhiyun STM32_GPIO_AF9,
113*4882a593Smuzhiyun STM32_GPIO_AF10,
114*4882a593Smuzhiyun STM32_GPIO_AF11,
115*4882a593Smuzhiyun STM32_GPIO_AF12,
116*4882a593Smuzhiyun STM32_GPIO_AF13,
117*4882a593Smuzhiyun STM32_GPIO_AF14,
118*4882a593Smuzhiyun STM32_GPIO_AF15
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun struct stm32_gpio_dsc {
122*4882a593Smuzhiyun enum stm32_gpio_port port;
123*4882a593Smuzhiyun enum stm32_gpio_pin pin;
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun struct stm32_gpio_ctl {
127*4882a593Smuzhiyun enum stm32_gpio_mode mode;
128*4882a593Smuzhiyun enum stm32_gpio_otype otype;
129*4882a593Smuzhiyun enum stm32_gpio_speed speed;
130*4882a593Smuzhiyun enum stm32_gpio_pupd pupd;
131*4882a593Smuzhiyun enum stm32_gpio_af af;
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun
stm32_gpio_to_port(unsigned gpio)134*4882a593Smuzhiyun static inline unsigned stm32_gpio_to_port(unsigned gpio)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun return gpio / 16;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
stm32_gpio_to_pin(unsigned gpio)139*4882a593Smuzhiyun static inline unsigned stm32_gpio_to_pin(unsigned gpio)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun return gpio % 16;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun int stm32_gpio_config(const struct stm32_gpio_dsc *gpio_dsc,
145*4882a593Smuzhiyun const struct stm32_gpio_ctl *gpio_ctl);
146*4882a593Smuzhiyun int stm32_gpout_set(const struct stm32_gpio_dsc *gpio_dsc, int state);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun #endif /* _STM32_GPIO_H_ */
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