1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2015-2016, Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __ASM_ARCH_CLOCK_H 8*4882a593Smuzhiyun #define __ASM_ARCH_CLOCK_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <common.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun enum mxc_clock { 13*4882a593Smuzhiyun MXC_ARM_CLK = 0, 14*4882a593Smuzhiyun MXC_BUS_CLK, 15*4882a593Smuzhiyun MXC_PERIPHERALS_CLK, 16*4882a593Smuzhiyun MXC_UART_CLK, 17*4882a593Smuzhiyun MXC_USDHC_CLK, 18*4882a593Smuzhiyun MXC_FEC_CLK, 19*4882a593Smuzhiyun MXC_I2C_CLK, 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun enum pll_type { 22*4882a593Smuzhiyun ARM_PLL = 0, 23*4882a593Smuzhiyun PERIPH_PLL, 24*4882a593Smuzhiyun ENET_PLL, 25*4882a593Smuzhiyun DDR_PLL, 26*4882a593Smuzhiyun VIDEO_PLL, 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun unsigned int mxc_get_clock(enum mxc_clock clk); 30*4882a593Smuzhiyun void clock_init(void); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #endif /* __ASM_ARCH_CLOCK_H */ 35