xref: /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2017 Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:     GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef __ROCKCHIP_SMCCC_H__
8*4882a593Smuzhiyun #define __ROCKCHIP_SMCCC_H__
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/arm-smccc.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun /* Rockchip platform SiP call ID */
13*4882a593Smuzhiyun #define SIP_ATF_VERSION			0x82000001
14*4882a593Smuzhiyun #define SIP_ACCESS_REG			0x82000002
15*4882a593Smuzhiyun #define SIP_SUSPEND_MODE		0x82000003
16*4882a593Smuzhiyun #define SIP_PENDING_CPUS		0x82000004
17*4882a593Smuzhiyun #define SIP_UARTDBG_CFG			0x82000005
18*4882a593Smuzhiyun #define SIP_UARTDBG_CFG64		0xc2000005
19*4882a593Smuzhiyun #define SIP_MCU_EL3FIQ_CFG		0x82000006
20*4882a593Smuzhiyun #define SIP_ACCESS_CHIP_STATE64		0xc2000006
21*4882a593Smuzhiyun #define SIP_SECURE_MEM_CONFIG		0x82000007
22*4882a593Smuzhiyun #define SIP_ACCESS_CHIP_EXTRA_STATE64	0xc2000007
23*4882a593Smuzhiyun #define SIP_DRAM_CONFIG			0x82000008
24*4882a593Smuzhiyun #define SIP_SHARE_MEM			0x82000009
25*4882a593Smuzhiyun #define SIP_SIP_VERSION			0x8200000a
26*4882a593Smuzhiyun #define SIP_REMOTECTL_CFG		0x8200000b
27*4882a593Smuzhiyun #define SIP_VPU_RESET			0x8200000c
28*4882a593Smuzhiyun #define SIP_SOC_BUS_DIV			0x8200000d
29*4882a593Smuzhiyun #define SIP_LAST_LOG			0x8200000e
30*4882a593Smuzhiyun #define SIP_AMP_CFG			0x82000022
31*4882a593Smuzhiyun #define SIP_HDCP_CONFIG			0x82000025
32*4882a593Smuzhiyun #define SIP_MCU_CFG			0x82000028
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_INIT		0x00
35*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE	0x01
36*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE	0x02
37*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_SET_AT_SR	0x03
38*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_GET_BW		0x04
39*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE	0x05
40*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ	0x06
41*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM	0x07
42*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION	0x08
43*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_POST_SET_RATE	0x09
44*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_SET_NOC_RL	0x0a
45*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_DEBUG		0x0b
46*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_MCU_START	0x0c
47*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_ECC		0x0d
48*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_GET_FREQ_INFO	0x0e
49*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DRAM_FSP_INIT	0x0f
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /* RK_SIP_MCU_CFG child configs, MCU ID */
52*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_BUSMCU_0_ID		0x00
53*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_BUSMCU_1_ID		0x01
54*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_PMUMCU_0_ID		0x10
55*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_DDRMCU_0_ID		0x20
56*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_NPUMCU_0_ID		0x30
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /* RK_SIP_MCU_CFG child configs */
59*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_MCU_CODE_START_ADDR		0x01
60*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_MCU_EXPERI_START_ADDR	0x02
61*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_MCU_SRAM_START_ADDR		0x03
62*4882a593Smuzhiyun #define ROCKCHIP_SIP_CONFIG_MCU_EXSRAM_START_ADDR	0x04
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* Rockchip Sip version */
65*4882a593Smuzhiyun #define SIP_IMPLEMENT_V1                (1)
66*4882a593Smuzhiyun #define SIP_IMPLEMENT_V2                (2)
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /* Error return code */
69*4882a593Smuzhiyun #define IS_SIP_ERROR(x)			(!!(x))
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define SIP_RET_SUCCESS			0
72*4882a593Smuzhiyun #define SIP_RET_SMC_UNKNOWN		-1
73*4882a593Smuzhiyun #define SIP_RET_NOT_SUPPORTED		-2
74*4882a593Smuzhiyun #define SIP_RET_INVALID_PARAMS		-3
75*4882a593Smuzhiyun #define SIP_RET_INVALID_ADDRESS		-4
76*4882a593Smuzhiyun #define SIP_RET_DENIED			-5
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* SIP_ACCESS_REG: read or write */
79*4882a593Smuzhiyun #define SECURE_REG_RD			0x0
80*4882a593Smuzhiyun #define SECURE_REG_WR			0x1
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun /* SIP_AMP_CFG */
83*4882a593Smuzhiyun #define AMP_PE_STATE			0x0
84*4882a593Smuzhiyun #define AMP_BOOT_ARG01			0x1
85*4882a593Smuzhiyun #define AMP_BOOT_ARG23			0x2
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* Share mem page types */
88*4882a593Smuzhiyun typedef enum {
89*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_INVALID = 0,
90*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_UARTDBG,
91*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_DDR,
92*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_DDRDBG,
93*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_DDRECC,
94*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_DDRFSP,
95*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_DDR_ADDRMAP,
96*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_LAST_LOG,
97*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_HDCP,
98*4882a593Smuzhiyun 	SHARE_PAGE_TYPE_MAX,
99*4882a593Smuzhiyun } share_page_type_t;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /* hdcp config func */
102*4882a593Smuzhiyun typedef enum {
103*4882a593Smuzhiyun 	HDCP_FUNC_STORAGE_ENCRYPT = 1,
104*4882a593Smuzhiyun 	HDCP_FUNC_KEY_DECRYPT,
105*4882a593Smuzhiyun 	HDCP_FUNC_KEY_LOAD,
106*4882a593Smuzhiyun 	HDCP_FUNC_ENCRYPT_MODE
107*4882a593Smuzhiyun } sip_hdcp_func_t;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun /*
110*4882a593Smuzhiyun  * sip_smc_set_suspend_mode() - Set U-Boot system suspend state before trap to trust.
111*4882a593Smuzhiyun  *
112*4882a593Smuzhiyun  * see kernel-4.4: drivers/soc/rockchip/rockchip_pm_config.c
113*4882a593Smuzhiyun  */
114*4882a593Smuzhiyun int sip_smc_set_suspend_mode(unsigned long ctrl,
115*4882a593Smuzhiyun 			     unsigned long config1,
116*4882a593Smuzhiyun 			     unsigned long config2);
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun int sip_smc_remotectl_config(unsigned long func, unsigned long data);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun /*
121*4882a593Smuzhiyun  * sip_smc_amp_cfg() - config AMP
122*4882a593Smuzhiyun  */
123*4882a593Smuzhiyun int sip_smc_amp_cfg(unsigned long func, unsigned long arg0, unsigned long arg1,
124*4882a593Smuzhiyun 		    unsigned long arg2);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun  * sip_smc_dram() - Set dram configure for trust.
128*4882a593Smuzhiyun  *
129*4882a593Smuzhiyun  * see: ./drivers/ram/rockchip/rockchip_dmc.c
130*4882a593Smuzhiyun  */
131*4882a593Smuzhiyun struct arm_smccc_res sip_smc_dram(unsigned long arg0,
132*4882a593Smuzhiyun 				  unsigned long arg1,
133*4882a593Smuzhiyun 				  unsigned long arg2);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun /*
136*4882a593Smuzhiyun  * sip_smc_request_share_mem() - Request share memory from trust.
137*4882a593Smuzhiyun  *
138*4882a593Smuzhiyun  * @page_num:	page numbers
139*4882a593Smuzhiyun  * @page_type:  page type, see: share_page_type_t
140*4882a593Smuzhiyun  *
141*4882a593Smuzhiyun  * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
142*4882a593Smuzhiyun  *  share memory base address), otherwise failed.
143*4882a593Smuzhiyun  */
144*4882a593Smuzhiyun struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
145*4882a593Smuzhiyun 					       share_page_type_t page_type);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun /*
148*4882a593Smuzhiyun  * sip_smc_secure_reg_read() - Read secure info(ddr/register...) from trust.
149*4882a593Smuzhiyun  *
150*4882a593Smuzhiyun  * @addr_phy:	address to read
151*4882a593Smuzhiyun  *
152*4882a593Smuzhiyun  * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
153*4882a593Smuzhiyun  *  valid data), otherwise failed.
154*4882a593Smuzhiyun  */
155*4882a593Smuzhiyun struct arm_smccc_res sip_smc_secure_reg_read(unsigned long addr_phy);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun  * sip_smc_secure_reg_write() - Write data to trust secure info(ddr/register...).
159*4882a593Smuzhiyun  *
160*4882a593Smuzhiyun  * @addr_phy:	address to write
161*4882a593Smuzhiyun  * @val:	value to write
162*4882a593Smuzhiyun  *
163*4882a593Smuzhiyun  * @return 0 on success, otherwise failed.
164*4882a593Smuzhiyun  */
165*4882a593Smuzhiyun int sip_smc_secure_reg_write(unsigned long addr_phy, unsigned long val);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun /*
168*4882a593Smuzhiyun  * sip_smc_set_sip_version() - Set sip version to trust.
169*4882a593Smuzhiyun  *
170*4882a593Smuzhiyun  * @return 0 on success, otherwise failed.
171*4882a593Smuzhiyun  */
172*4882a593Smuzhiyun int sip_smc_set_sip_version(unsigned long version);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /*
175*4882a593Smuzhiyun  * sip_smc_get_sip_version() - Get sip version to trust.
176*4882a593Smuzhiyun  *
177*4882a593Smuzhiyun  * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
178*4882a593Smuzhiyun  *  sip version), otherwise failed.
179*4882a593Smuzhiyun  */
180*4882a593Smuzhiyun struct arm_smccc_res sip_smc_get_sip_version(void);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun /*
183*4882a593Smuzhiyun  * sip_smc_hdcp_config() - handle hdcp.
184*4882a593Smuzhiyun  *
185*4882a593Smuzhiyun  * @return  0 on success, otherwise failed.
186*4882a593Smuzhiyun  */
187*4882a593Smuzhiyun int sip_smc_hdcp_config(unsigned long func,
188*4882a593Smuzhiyun 			unsigned long arg1, unsigned long arg2);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun /*
191*4882a593Smuzhiyun  * sip_smc_mcu_config() - handle mcu.
192*4882a593Smuzhiyun  *
193*4882a593Smuzhiyun  * @return  0 on success, otherwise failed.
194*4882a593Smuzhiyun  */
195*4882a593Smuzhiyun int sip_smc_mcu_config(unsigned long mcu_id, unsigned long func, unsigned long arg2);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun /*
198*4882a593Smuzhiyun  * psci_cpu_on() - Standard ARM PSCI cpu on call.
199*4882a593Smuzhiyun  *
200*4882a593Smuzhiyun  * @cpuid:		cpu id
201*4882a593Smuzhiyun  * @entry_point:	boot entry point
202*4882a593Smuzhiyun  *
203*4882a593Smuzhiyun  * @return 0 on success, otherwise failed.
204*4882a593Smuzhiyun  */
205*4882a593Smuzhiyun int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun #ifdef CONFIG_ARM_CPU_SUSPEND
208*4882a593Smuzhiyun /*
209*4882a593Smuzhiyun  * psci_system_suspend() - Standard ARM PSCI system suspend call.
210*4882a593Smuzhiyun  *
211*4882a593Smuzhiyun  * @unused:		unused now, always 0 recommend
212*4882a593Smuzhiyun  *
213*4882a593Smuzhiyun  * @return 0 on success, otherwise failed.
214*4882a593Smuzhiyun  */
215*4882a593Smuzhiyun int psci_system_suspend(unsigned long unused);
216*4882a593Smuzhiyun #endif
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun #endif
219