1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _ASM_ARCH_PMU_RK3188_H 8*4882a593Smuzhiyun #define _ASM_ARCH_PMU_RK3188_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun struct rk3188_pmu { 11*4882a593Smuzhiyun u32 wakeup_cfg[2]; 12*4882a593Smuzhiyun u32 pwrdn_con; 13*4882a593Smuzhiyun u32 pwrdn_st; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun u32 int_con; 16*4882a593Smuzhiyun u32 int_st; 17*4882a593Smuzhiyun u32 misc_con; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun u32 osc_cnt; 20*4882a593Smuzhiyun u32 pll_cnt; 21*4882a593Smuzhiyun u32 pmu_cnt; 22*4882a593Smuzhiyun u32 ddrio_pwron_cnt; 23*4882a593Smuzhiyun u32 wakeup_rst_clr_cnt; 24*4882a593Smuzhiyun u32 scu_pwrdwn_cnt; 25*4882a593Smuzhiyun u32 scu_pwrup_cnt; 26*4882a593Smuzhiyun u32 misc_con1; 27*4882a593Smuzhiyun u32 gpio0_con; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun u32 sys_reg[4]; 30*4882a593Smuzhiyun u32 reserved0[4]; 31*4882a593Smuzhiyun u32 stop_int_dly; 32*4882a593Smuzhiyun u32 gpio0_p[2]; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun check_member(rk3188_pmu, gpio0_p[1], 0x0068); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #endif 37