1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #ifndef _ASM_ARCH_GRF_px30_H 7*4882a593Smuzhiyun #define _ASM_ARCH_GRF_px30_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <common.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct px30_grf { 12*4882a593Smuzhiyun unsigned int gpio1al_iomux; 13*4882a593Smuzhiyun unsigned int gpio1ah_iomux; 14*4882a593Smuzhiyun unsigned int gpio1bl_iomux; 15*4882a593Smuzhiyun unsigned int gpio1bh_iomux; 16*4882a593Smuzhiyun unsigned int gpio1cl_iomux; 17*4882a593Smuzhiyun unsigned int gpio1ch_iomux; 18*4882a593Smuzhiyun unsigned int gpio1dl_iomux; 19*4882a593Smuzhiyun unsigned int gpio1dh_iomux; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun unsigned int gpio2al_iomux; 22*4882a593Smuzhiyun unsigned int gpio2ah_iomux; 23*4882a593Smuzhiyun unsigned int gpio2bl_iomux; 24*4882a593Smuzhiyun unsigned int gpio2bh_iomux; 25*4882a593Smuzhiyun unsigned int gpio2cl_iomux; 26*4882a593Smuzhiyun unsigned int gpio2ch_iomux; 27*4882a593Smuzhiyun unsigned int gpio2dl_iomux; 28*4882a593Smuzhiyun unsigned int gpio2dh_iomux; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun unsigned int gpio3al_iomux; 31*4882a593Smuzhiyun unsigned int gpio3ah_iomux; 32*4882a593Smuzhiyun unsigned int gpio3bl_iomux; 33*4882a593Smuzhiyun unsigned int gpio3bh_iomux; 34*4882a593Smuzhiyun unsigned int gpio3cl_iomux; 35*4882a593Smuzhiyun unsigned int gpio3ch_iomux; 36*4882a593Smuzhiyun unsigned int gpio3dl_iomux; 37*4882a593Smuzhiyun unsigned int gpio3dh_iomux; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun unsigned int gpio1a_p; 40*4882a593Smuzhiyun unsigned int gpio1b_p; 41*4882a593Smuzhiyun unsigned int gpio1c_p; 42*4882a593Smuzhiyun unsigned int gpio1d_p; 43*4882a593Smuzhiyun unsigned int gpio2a_p; 44*4882a593Smuzhiyun unsigned int gpio2b_p; 45*4882a593Smuzhiyun unsigned int gpio2c_p; 46*4882a593Smuzhiyun unsigned int gpio2d_p; 47*4882a593Smuzhiyun unsigned int gpio3a_p; 48*4882a593Smuzhiyun unsigned int gpio3b_p; 49*4882a593Smuzhiyun unsigned int gpio3c_p; 50*4882a593Smuzhiyun unsigned int gpio3d_p; 51*4882a593Smuzhiyun unsigned int gpio1a_sr; 52*4882a593Smuzhiyun unsigned int gpio1b_sr; 53*4882a593Smuzhiyun unsigned int gpio1c_sr; 54*4882a593Smuzhiyun unsigned int gpio1d_sr; 55*4882a593Smuzhiyun unsigned int gpio2a_sr; 56*4882a593Smuzhiyun unsigned int gpio2b_sr; 57*4882a593Smuzhiyun unsigned int gpio2c_sr; 58*4882a593Smuzhiyun unsigned int gpio2d_sr; 59*4882a593Smuzhiyun unsigned int gpio3a_sr; 60*4882a593Smuzhiyun unsigned int gpio3b_sr; 61*4882a593Smuzhiyun unsigned int gpio3c_sr; 62*4882a593Smuzhiyun unsigned int gpio3d_sr; 63*4882a593Smuzhiyun unsigned int gpio1a_smt; 64*4882a593Smuzhiyun unsigned int gpio1b_smt; 65*4882a593Smuzhiyun unsigned int gpio1c_smt; 66*4882a593Smuzhiyun unsigned int gpio1d_smt; 67*4882a593Smuzhiyun unsigned int gpio2a_smt; 68*4882a593Smuzhiyun unsigned int gpio2b_smt; 69*4882a593Smuzhiyun unsigned int gpio2c_smt; 70*4882a593Smuzhiyun unsigned int gpio2d_smt; 71*4882a593Smuzhiyun unsigned int gpio3a_smt; 72*4882a593Smuzhiyun unsigned int gpio3b_smt; 73*4882a593Smuzhiyun unsigned int gpio3c_smt; 74*4882a593Smuzhiyun unsigned int gpio3d_smt; 75*4882a593Smuzhiyun unsigned int gpio1a_e; 76*4882a593Smuzhiyun unsigned int gpio1b_e; 77*4882a593Smuzhiyun unsigned int gpio1c_e; 78*4882a593Smuzhiyun unsigned int gpio1d_e; 79*4882a593Smuzhiyun unsigned int gpio2a_e; 80*4882a593Smuzhiyun unsigned int gpio2b_e; 81*4882a593Smuzhiyun unsigned int gpio2c_e; 82*4882a593Smuzhiyun unsigned int gpio2d_e; 83*4882a593Smuzhiyun unsigned int gpio3a_e; 84*4882a593Smuzhiyun unsigned int gpio3b_e; 85*4882a593Smuzhiyun unsigned int gpio3c_e; 86*4882a593Smuzhiyun unsigned int gpio3d_e; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun unsigned int reserved0[(0x180 - 0x11C) / 4 - 1]; 89*4882a593Smuzhiyun unsigned int io_vsel; 90*4882a593Smuzhiyun unsigned int iofunc_con0; 91*4882a593Smuzhiyun unsigned int reserved1[(0x400 - 0x184) / 4 - 1]; 92*4882a593Smuzhiyun unsigned int soc_con[6]; 93*4882a593Smuzhiyun unsigned int reserved2[(0x480 - 0x414) / 4 - 1]; 94*4882a593Smuzhiyun unsigned int soc_status0; 95*4882a593Smuzhiyun unsigned int reserved3[(0x500 - 0x480) / 4 - 1]; 96*4882a593Smuzhiyun unsigned int cpu_con[3]; 97*4882a593Smuzhiyun unsigned int reserved4[5]; 98*4882a593Smuzhiyun unsigned int cpu_status[2]; 99*4882a593Smuzhiyun unsigned int reserved5[2]; 100*4882a593Smuzhiyun unsigned int soc_noc_con[2]; 101*4882a593Smuzhiyun unsigned int reserved6[6]; 102*4882a593Smuzhiyun unsigned int ddr_bankhash[4]; 103*4882a593Smuzhiyun unsigned int reserved7[(0x700 - 0x55c) / 4 - 1]; 104*4882a593Smuzhiyun unsigned int host0_con[2]; 105*4882a593Smuzhiyun unsigned int reserved8[(0x880 - 0x704) / 4 - 1]; 106*4882a593Smuzhiyun unsigned int otg_con3; 107*4882a593Smuzhiyun unsigned int reserved9[3]; 108*4882a593Smuzhiyun unsigned int host0_status4; 109*4882a593Smuzhiyun unsigned int reserved10[(0x904 - 0x890) / 4 - 1]; 110*4882a593Smuzhiyun unsigned int mac_con1; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun check_member(px30_grf, mac_con1, 0x904); 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun struct px30_pmugrf { 116*4882a593Smuzhiyun unsigned int gpio0a_iomux; 117*4882a593Smuzhiyun unsigned int gpio0b_iomux; 118*4882a593Smuzhiyun unsigned int gpio0c_iomux; 119*4882a593Smuzhiyun unsigned int reserved0[1]; 120*4882a593Smuzhiyun unsigned int gpio0a_p; 121*4882a593Smuzhiyun unsigned int gpio0b_p; 122*4882a593Smuzhiyun unsigned int gpio0c_p; 123*4882a593Smuzhiyun unsigned int reserved1[1]; 124*4882a593Smuzhiyun unsigned int gpio0a_e; 125*4882a593Smuzhiyun unsigned int gpio0b_e; 126*4882a593Smuzhiyun unsigned int gpio0c_e; 127*4882a593Smuzhiyun unsigned int reserved2[1]; 128*4882a593Smuzhiyun unsigned int gpio0l_sr; 129*4882a593Smuzhiyun unsigned int gpio0h_sr; 130*4882a593Smuzhiyun unsigned int gpio0l_smt; 131*4882a593Smuzhiyun unsigned int gpio0h_smt; 132*4882a593Smuzhiyun unsigned int reserved3[(0x100 - 0x3c) / 4 - 1]; 133*4882a593Smuzhiyun unsigned int soc_con[3]; 134*4882a593Smuzhiyun unsigned int failsafe_con; 135*4882a593Smuzhiyun unsigned int reserved4[(0x180 - 0x10c) / 4 - 1]; 136*4882a593Smuzhiyun unsigned int pvtm_con[2]; 137*4882a593Smuzhiyun unsigned int reserved5[2]; 138*4882a593Smuzhiyun unsigned int pvtm_status[2]; 139*4882a593Smuzhiyun unsigned int reserved6[(0x200 - 0x194) / 4 - 1]; 140*4882a593Smuzhiyun unsigned int os_reg[12]; 141*4882a593Smuzhiyun unsigned int reset_function_status; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun check_member(px30_pmugrf, reset_function_status, 0x230); 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #endif 147