1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2015 Google, Inc 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _ASM_ARCH_DDR_RK3188_H 8*4882a593Smuzhiyun #define _ASM_ARCH_DDR_RK3188_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <asm/arch/ddr_rk3288.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * RK3188 Memory scheduler register map. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun struct rk3188_msch { 16*4882a593Smuzhiyun u32 coreid; 17*4882a593Smuzhiyun u32 revisionid; 18*4882a593Smuzhiyun u32 ddrconf; 19*4882a593Smuzhiyun u32 ddrtiming; 20*4882a593Smuzhiyun u32 ddrmode; 21*4882a593Smuzhiyun u32 readlatency; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun check_member(rk3188_msch, readlatency, 0x0014); 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif 26