1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2017 Heiko Stuebner <heiko@sntech.de> 3*4882a593Smuzhiyun * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _ASM_ARCH_BOOTROM_H 9*4882a593Smuzhiyun #define _ASM_ARCH_BOOTROM_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Saved Stack pointer address. 13*4882a593Smuzhiyun * Access might be needed in some special cases. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun extern u32 SAVE_SP_ADDR; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /** 18*4882a593Smuzhiyun * back_to_bootrom() - return to bootrom (for TPL/SPL), passing a 19*4882a593Smuzhiyun * result code 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * Transfer control back to the Rockchip BROM, restoring necessary 22*4882a593Smuzhiyun * register context and passing a command/result code to the BROM 23*4882a593Smuzhiyun * to instruct its next actions (e.g. continue boot sequence, enter 24*4882a593Smuzhiyun * download mode, ...). 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * This function does not return. 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun * @brom_cmd: indicates how the bootrom should continue the boot 29*4882a593Smuzhiyun * sequence (e.g. load the next stage) 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun enum rockchip_bootrom_cmd { 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * These can not start at 0, as 0 has a special meaning 34*4882a593Smuzhiyun * for setjmp(). 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun BROM_BOOT_NEXTSTAGE = 1, /* continue boot-sequence */ 38*4882a593Smuzhiyun BROM_BOOT_ENTER_DNL, /* have BROM enter download-mode */ 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd); 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /** 44*4882a593Smuzhiyun * Boot-device identifiers as used by the BROM 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun enum { 47*4882a593Smuzhiyun BROM_BOOTSOURCE_UNKNOWN = 0, 48*4882a593Smuzhiyun BROM_BOOTSOURCE_NAND = 1, 49*4882a593Smuzhiyun BROM_BOOTSOURCE_EMMC = 2, 50*4882a593Smuzhiyun BROM_BOOTSOURCE_SPINOR = 3, 51*4882a593Smuzhiyun BROM_BOOTSOURCE_SPINAND = 4, 52*4882a593Smuzhiyun BROM_BOOTSOURCE_SD = 5, 53*4882a593Smuzhiyun BROM_BOOTSOURCE_I2C = 8, 54*4882a593Smuzhiyun BROM_BOOTSOURCE_SPI = 9, 55*4882a593Smuzhiyun BROM_BOOTSOURCE_USB = 10, 56*4882a593Smuzhiyun BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1]; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /** 62*4882a593Smuzhiyun * Locations of the boot-device identifier in SRAM 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun #define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10) 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #endif 68