xref: /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mxs/iomux.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
3*4882a593Smuzhiyun  *			<armlinux@phytec.de>
4*4882a593Smuzhiyun  * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __MACH_MXS_IOMUX_H__
10*4882a593Smuzhiyun #define __MACH_MXS_IOMUX_H__
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #ifndef __ASSEMBLY__
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <asm/types.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * IOMUX/PAD Bit field definitions
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * PAD_BANK:		 0..2	(3)
20*4882a593Smuzhiyun  * PAD_PIN:		 3..7	(5)
21*4882a593Smuzhiyun  * PAD_MUXSEL:		 8..9	(2)
22*4882a593Smuzhiyun  * PAD_MA:		10..11	(2)
23*4882a593Smuzhiyun  * PAD_MA_VALID:	12	(1)
24*4882a593Smuzhiyun  * PAD_VOL:		13	(1)
25*4882a593Smuzhiyun  * PAD_VOL_VALID:	14	(1)
26*4882a593Smuzhiyun  * PAD_PULL:		15	(1)
27*4882a593Smuzhiyun  * PAD_PULL_VALID:	16	(1)
28*4882a593Smuzhiyun  * RESERVED:		17..31	(15)
29*4882a593Smuzhiyun  */
30*4882a593Smuzhiyun typedef u32 iomux_cfg_t;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define MXS_PAD_BANK_SHIFT	0
33*4882a593Smuzhiyun #define MXS_PAD_BANK_MASK	((iomux_cfg_t)0x7 << MXS_PAD_BANK_SHIFT)
34*4882a593Smuzhiyun #define MXS_PAD_PIN_SHIFT	3
35*4882a593Smuzhiyun #define MXS_PAD_PIN_MASK	((iomux_cfg_t)0x1f << MXS_PAD_PIN_SHIFT)
36*4882a593Smuzhiyun #define MXS_PAD_MUXSEL_SHIFT	8
37*4882a593Smuzhiyun #define MXS_PAD_MUXSEL_MASK	((iomux_cfg_t)0x3 << MXS_PAD_MUXSEL_SHIFT)
38*4882a593Smuzhiyun #define MXS_PAD_MA_SHIFT	10
39*4882a593Smuzhiyun #define MXS_PAD_MA_MASK		((iomux_cfg_t)0x3 << MXS_PAD_MA_SHIFT)
40*4882a593Smuzhiyun #define MXS_PAD_MA_VALID_SHIFT	12
41*4882a593Smuzhiyun #define MXS_PAD_MA_VALID_MASK	((iomux_cfg_t)0x1 << MXS_PAD_MA_VALID_SHIFT)
42*4882a593Smuzhiyun #define MXS_PAD_VOL_SHIFT	13
43*4882a593Smuzhiyun #define MXS_PAD_VOL_MASK	((iomux_cfg_t)0x1 << MXS_PAD_VOL_SHIFT)
44*4882a593Smuzhiyun #define MXS_PAD_VOL_VALID_SHIFT	14
45*4882a593Smuzhiyun #define MXS_PAD_VOL_VALID_MASK	((iomux_cfg_t)0x1 << MXS_PAD_VOL_VALID_SHIFT)
46*4882a593Smuzhiyun #define MXS_PAD_PULL_SHIFT	15
47*4882a593Smuzhiyun #define MXS_PAD_PULL_MASK	((iomux_cfg_t)0x1 << MXS_PAD_PULL_SHIFT)
48*4882a593Smuzhiyun #define MXS_PAD_PULL_VALID_SHIFT 16
49*4882a593Smuzhiyun #define MXS_PAD_PULL_VALID_MASK	((iomux_cfg_t)0x1 << MXS_PAD_PULL_VALID_SHIFT)
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define PAD_MUXSEL_0		0
52*4882a593Smuzhiyun #define PAD_MUXSEL_1		1
53*4882a593Smuzhiyun #define PAD_MUXSEL_2		2
54*4882a593Smuzhiyun #define PAD_MUXSEL_GPIO		3
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define PAD_4MA			0
57*4882a593Smuzhiyun #define PAD_8MA			1
58*4882a593Smuzhiyun #define PAD_12MA		2
59*4882a593Smuzhiyun #define PAD_16MA		3
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define PAD_1V8			0
62*4882a593Smuzhiyun #if defined(CONFIG_MX28)
63*4882a593Smuzhiyun #define PAD_3V3			1
64*4882a593Smuzhiyun #else
65*4882a593Smuzhiyun #define PAD_3V3			0
66*4882a593Smuzhiyun #endif
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define PAD_NOPULL		0
69*4882a593Smuzhiyun #define PAD_PULLUP		1
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define MXS_PAD_4MA	((PAD_4MA << MXS_PAD_MA_SHIFT) | \
72*4882a593Smuzhiyun 					MXS_PAD_MA_VALID_MASK)
73*4882a593Smuzhiyun #define MXS_PAD_8MA	((PAD_8MA << MXS_PAD_MA_SHIFT) | \
74*4882a593Smuzhiyun 					MXS_PAD_MA_VALID_MASK)
75*4882a593Smuzhiyun #define MXS_PAD_12MA	((PAD_12MA << MXS_PAD_MA_SHIFT) | \
76*4882a593Smuzhiyun 					MXS_PAD_MA_VALID_MASK)
77*4882a593Smuzhiyun #define MXS_PAD_16MA	((PAD_16MA << MXS_PAD_MA_SHIFT) | \
78*4882a593Smuzhiyun 					MXS_PAD_MA_VALID_MASK)
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun #define MXS_PAD_1V8	((PAD_1V8 << MXS_PAD_VOL_SHIFT) | \
81*4882a593Smuzhiyun 					MXS_PAD_VOL_VALID_MASK)
82*4882a593Smuzhiyun #define MXS_PAD_3V3	((PAD_3V3 << MXS_PAD_VOL_SHIFT) | \
83*4882a593Smuzhiyun 					MXS_PAD_VOL_VALID_MASK)
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun #define MXS_PAD_NOPULL	((PAD_NOPULL << MXS_PAD_PULL_SHIFT) | \
86*4882a593Smuzhiyun 					MXS_PAD_PULL_VALID_MASK)
87*4882a593Smuzhiyun #define MXS_PAD_PULLUP	((PAD_PULLUP << MXS_PAD_PULL_SHIFT) | \
88*4882a593Smuzhiyun 					MXS_PAD_PULL_VALID_MASK)
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* generic pad control used in most cases */
91*4882a593Smuzhiyun #define MXS_PAD_CTRL	(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL)
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define MXS_IOMUX_PAD(_bank, _pin, _muxsel, _ma, _vol, _pull)		\
94*4882a593Smuzhiyun 		(((iomux_cfg_t)(_bank) << MXS_PAD_BANK_SHIFT) |		\
95*4882a593Smuzhiyun 		((iomux_cfg_t)(_pin) << MXS_PAD_PIN_SHIFT) |		\
96*4882a593Smuzhiyun 		((iomux_cfg_t)(_muxsel) << MXS_PAD_MUXSEL_SHIFT) |	\
97*4882a593Smuzhiyun 		((iomux_cfg_t)(_ma) << MXS_PAD_MA_SHIFT) |		\
98*4882a593Smuzhiyun 		((iomux_cfg_t)(_vol) << MXS_PAD_VOL_SHIFT) |		\
99*4882a593Smuzhiyun 		((iomux_cfg_t)(_pull) << MXS_PAD_PULL_SHIFT))
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /*
102*4882a593Smuzhiyun  * A pad becomes naked, when none of mA, vol or pull
103*4882a593Smuzhiyun  * validity bits is set.
104*4882a593Smuzhiyun  */
105*4882a593Smuzhiyun #define MXS_IOMUX_PAD_NAKED(_bank, _pin, _muxsel) \
106*4882a593Smuzhiyun 		MXS_IOMUX_PAD(_bank, _pin, _muxsel, 0, 0, 0)
107*4882a593Smuzhiyun 
PAD_BANK(iomux_cfg_t pad)108*4882a593Smuzhiyun static inline unsigned int PAD_BANK(iomux_cfg_t pad)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	return (pad & MXS_PAD_BANK_MASK) >> MXS_PAD_BANK_SHIFT;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
PAD_PIN(iomux_cfg_t pad)113*4882a593Smuzhiyun static inline unsigned int PAD_PIN(iomux_cfg_t pad)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	return (pad & MXS_PAD_PIN_MASK) >> MXS_PAD_PIN_SHIFT;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
PAD_MUXSEL(iomux_cfg_t pad)118*4882a593Smuzhiyun static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	return (pad & MXS_PAD_MUXSEL_MASK) >> MXS_PAD_MUXSEL_SHIFT;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
PAD_MA(iomux_cfg_t pad)123*4882a593Smuzhiyun static inline unsigned int PAD_MA(iomux_cfg_t pad)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	return (pad & MXS_PAD_MA_MASK) >> MXS_PAD_MA_SHIFT;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun 
PAD_MA_VALID(iomux_cfg_t pad)128*4882a593Smuzhiyun static inline unsigned int PAD_MA_VALID(iomux_cfg_t pad)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	return (pad & MXS_PAD_MA_VALID_MASK) >> MXS_PAD_MA_VALID_SHIFT;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
PAD_VOL(iomux_cfg_t pad)133*4882a593Smuzhiyun static inline unsigned int PAD_VOL(iomux_cfg_t pad)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	return (pad & MXS_PAD_VOL_MASK) >> MXS_PAD_VOL_SHIFT;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
PAD_VOL_VALID(iomux_cfg_t pad)138*4882a593Smuzhiyun static inline unsigned int PAD_VOL_VALID(iomux_cfg_t pad)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	return (pad & MXS_PAD_VOL_VALID_MASK) >> MXS_PAD_VOL_VALID_SHIFT;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
PAD_PULL(iomux_cfg_t pad)143*4882a593Smuzhiyun static inline unsigned int PAD_PULL(iomux_cfg_t pad)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun 	return (pad & MXS_PAD_PULL_MASK) >> MXS_PAD_PULL_SHIFT;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
PAD_PULL_VALID(iomux_cfg_t pad)148*4882a593Smuzhiyun static inline unsigned int PAD_PULL_VALID(iomux_cfg_t pad)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	return (pad & MXS_PAD_PULL_VALID_MASK) >> MXS_PAD_PULL_VALID_SHIFT;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun  * configures a single pad in the iomuxer
155*4882a593Smuzhiyun  */
156*4882a593Smuzhiyun int mxs_iomux_setup_pad(iomux_cfg_t pad);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /*
159*4882a593Smuzhiyun  * configures multiple pads
160*4882a593Smuzhiyun  * convenient way to call the above function with tables
161*4882a593Smuzhiyun  */
162*4882a593Smuzhiyun int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */
165*4882a593Smuzhiyun #endif /* __MACH_MXS_IOMUX_H__*/
166