1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __ASM_ARCH_CLOCK_H 9*4882a593Smuzhiyun #define __ASM_ARCH_CLOCK_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum mxc_clock { 12*4882a593Smuzhiyun MXC_ARM_CLK, 13*4882a593Smuzhiyun MXC_I2C_CLK, 14*4882a593Smuzhiyun MXC_UART_CLK, 15*4882a593Smuzhiyun MXC_ESDHC_CLK, 16*4882a593Smuzhiyun MXC_FEC_CLK, 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun unsigned int mxc_get_clock(enum mxc_clock clk); 20*4882a593Smuzhiyun #define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK) 21*4882a593Smuzhiyun #define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #endif /* __ASM_ARCH_CLOCK_H */ 24