xref: /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx25/clock.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * (c) 2009 Ilya Yanok, Emcraft Systems <yanok@emcraft.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Modified for mx25 by John Rigby <jrigby@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef __ASM_ARCH_CLOCK_H
11*4882a593Smuzhiyun #define __ASM_ARCH_CLOCK_H
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #ifdef CONFIG_MX25_HCLK_FREQ
16*4882a593Smuzhiyun #define MXC_HCLK	CONFIG_MX25_HCLK_FREQ
17*4882a593Smuzhiyun #else
18*4882a593Smuzhiyun #define MXC_HCLK	24000000
19*4882a593Smuzhiyun #endif
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #ifdef CONFIG_MX25_CLK32
22*4882a593Smuzhiyun #define MXC_CLK32	CONFIG_MX25_CLK32
23*4882a593Smuzhiyun #else
24*4882a593Smuzhiyun #define MXC_CLK32	32768
25*4882a593Smuzhiyun #endif
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun enum mxc_clock {
28*4882a593Smuzhiyun 	/* PER clocks (do not change order) */
29*4882a593Smuzhiyun 	MXC_CSI_CLK,
30*4882a593Smuzhiyun 	MXC_EPIT_CLK,
31*4882a593Smuzhiyun 	MXC_ESAI_CLK,
32*4882a593Smuzhiyun 	MXC_ESDHC1_CLK,
33*4882a593Smuzhiyun 	MXC_ESDHC2_CLK,
34*4882a593Smuzhiyun 	MXC_GPT_CLK,
35*4882a593Smuzhiyun 	MXC_I2C_CLK,
36*4882a593Smuzhiyun 	MXC_LCDC_CLK,
37*4882a593Smuzhiyun 	MXC_NFC_CLK,
38*4882a593Smuzhiyun 	MXC_OWIRE_CLK,
39*4882a593Smuzhiyun 	MXC_PWM_CLK,
40*4882a593Smuzhiyun 	MXC_SIM1_CLK,
41*4882a593Smuzhiyun 	MXC_SIM2_CLK,
42*4882a593Smuzhiyun 	MXC_SSI1_CLK,
43*4882a593Smuzhiyun 	MXC_SSI2_CLK,
44*4882a593Smuzhiyun 	MXC_UART_CLK,
45*4882a593Smuzhiyun 	/* Other clocks */
46*4882a593Smuzhiyun 	MXC_ARM_CLK,
47*4882a593Smuzhiyun 	MXC_AHB_CLK,
48*4882a593Smuzhiyun 	MXC_IPG_CLK,
49*4882a593Smuzhiyun 	MXC_CSPI_CLK,
50*4882a593Smuzhiyun 	MXC_FEC_CLK,
51*4882a593Smuzhiyun 	MXC_CLK_NUM
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq);
55*4882a593Smuzhiyun unsigned int mxc_get_clock(enum mxc_clock clk);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define imx_get_uartclk()	mxc_get_clock(MXC_UART_CLK)
58*4882a593Smuzhiyun #define imx_get_fecclk()	mxc_get_clock(MXC_FEC_CLK)
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #endif /* __ASM_ARCH_CLOCK_H */
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