1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Common definitions for LPC32XX board configurations 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _LPC32XX_CONFIG_H 10*4882a593Smuzhiyun #define _LPC32XX_CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* Basic CPU architecture */ 14*4882a593Smuzhiyun #define CONFIG_ARCH_CPU_INIT 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS_MAX 2 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* UART configuration */ 19*4882a593Smuzhiyun #if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ 20*4882a593Smuzhiyun (CONFIG_SYS_LPC32XX_UART == 7) 21*4882a593Smuzhiyun #if !defined(CONFIG_LPC32XX_HSUART) 22*4882a593Smuzhiyun #define CONFIG_LPC32XX_HSUART 23*4882a593Smuzhiyun #endif 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #if !defined(CONFIG_SYS_NS16550_CLK) 27*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_CLK 13000000 28*4882a593Smuzhiyun #endif 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #if !defined(CONFIG_LPC32XX_HSUART) 31*4882a593Smuzhiyun #define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) 32*4882a593Smuzhiyun #else 33*4882a593Smuzhiyun #define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART 34*4882a593Smuzhiyun #endif 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define CONFIG_SYS_BAUDRATE_TABLE \ 37*4882a593Smuzhiyun { 9600, 19200, 38400, 57600, 115200, 230400, 460800 } 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* Ethernet */ 40*4882a593Smuzhiyun #define LPC32XX_ETH_BASE ETHERNET_BASE 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* NAND */ 43*4882a593Smuzhiyun #if defined(CONFIG_NAND_LPC32XX_SLC) 44*4882a593Smuzhiyun #define NAND_LARGE_BLOCK_PAGE_SIZE 0x800 45*4882a593Smuzhiyun #define NAND_SMALL_BLOCK_PAGE_SIZE 0x200 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #if !defined(CONFIG_SYS_NAND_PAGE_SIZE) 48*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE 49*4882a593Smuzhiyun #endif 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE) 52*4882a593Smuzhiyun #define CONFIG_SYS_NAND_OOBSIZE 64 53*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 54*4882a593Smuzhiyun 48, 49, 50, 51, 52, 53, 54, 55, \ 55*4882a593Smuzhiyun 56, 57, 58, 59, 60, 61, 62, 63, } 56*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 57*4882a593Smuzhiyun #elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE) 58*4882a593Smuzhiyun #define CONFIG_SYS_NAND_OOBSIZE 16 59*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, } 60*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 61*4882a593Smuzhiyun #else 62*4882a593Smuzhiyun #error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value" 63*4882a593Smuzhiyun #endif 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCSIZE 0x100 66*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCBYTES 3 67*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 68*4882a593Smuzhiyun CONFIG_SYS_NAND_PAGE_SIZE) 69*4882a593Smuzhiyun #endif /* CONFIG_NAND_LPC32XX_SLC */ 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* NOR Flash */ 72*4882a593Smuzhiyun #if defined(CONFIG_SYS_FLASH_CFI) 73*4882a593Smuzhiyun #define CONFIG_FLASH_CFI_DRIVER 74*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_PROTECTION 75*4882a593Smuzhiyun #endif 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* USB OHCI */ 78*4882a593Smuzhiyun #if defined(CONFIG_USB_OHCI_LPC32XX) 79*4882a593Smuzhiyun #define CONFIG_USB_OHCI_NEW 80*4882a593Smuzhiyun #define CONFIG_SYS_USB_OHCI_CPU_INIT 81*4882a593Smuzhiyun #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 82*4882a593Smuzhiyun #define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE 83*4882a593Smuzhiyun #define CONFIG_SYS_USB_OHCI_SLOT_NAME "lpc32xx-ohci" 84*4882a593Smuzhiyun #endif 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #endif /* _LPC32XX_CONFIG_H */ 87