1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 - ARM Ltd 3*4882a593Smuzhiyun * Author: Marc Zyngier <marc.zyngier@arm.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Based on code by Carl van Schaik <carl@ok-labs.com>. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 8*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 9*4882a593Smuzhiyun * published by the Free Software Foundation. 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 12*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*4882a593Smuzhiyun * GNU General Public License for more details. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License 17*4882a593Smuzhiyun * along with this program. If not, see <http://www.gnu.org/licenses/>. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #ifndef _GENERICTIMER_H_ 21*4882a593Smuzhiyun #define _GENERICTIMER_H_ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef __ASSEMBLY__ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* 26*4882a593Smuzhiyun * This macro provide a physical timer that can be used for delay in the code. 27*4882a593Smuzhiyun * The macro is moved from sunxi/psci_sun7i.S 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * reg: is used in this macro. 30*4882a593Smuzhiyun * ticks: The freq is based on generic timer. 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun .macro timer_wait reg, ticks 33*4882a593Smuzhiyun movw \reg, #(\ticks & 0xffff) 34*4882a593Smuzhiyun movt \reg, #(\ticks >> 16) 35*4882a593Smuzhiyun mcr p15, 0, \reg, c14, c2, 0 36*4882a593Smuzhiyun isb 37*4882a593Smuzhiyun mov \reg, #3 38*4882a593Smuzhiyun mcr p15, 0, \reg, c14, c2, 1 39*4882a593Smuzhiyun 1 : isb 40*4882a593Smuzhiyun mrc p15, 0, \reg, c14, c2, 1 41*4882a593Smuzhiyun ands \reg, \reg, #4 42*4882a593Smuzhiyun bne 1b 43*4882a593Smuzhiyun mov \reg, #0 44*4882a593Smuzhiyun mcr p15, 0, \reg, c14, c2, 1 45*4882a593Smuzhiyun isb 46*4882a593Smuzhiyun .endm 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #endif /* _GENERICTIMER_H_ */ 51